Dual-Phase, Parallelable, Average Current-Mode

Controllers

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25

PC Board Layout

Use the following guidelines to layout the switching

voltage regulator.

the MAX5038/MAX5041.

2) Minimize the high-current loops from the input

capacitor, upper switching MOSFET, inductor, and

output capacitor back to the input capacitor nega-

tive terminal.

3) Keep short the current loop from the lower switch-

ing MOSFET, inductor, and output capacitor and

return to the source of the lower MOSFET.

4) Place the Schottky diodes close to the lower

MOSFETs and on the same side of the PC board.

5) Keep the SGND and PGND isolated and connect

them at one single point close to the negative termi-

nal of the input filter capacitor.

6) Run the current-sense lines CS+ and CS- very

close to each other to minimize the loop area.

Similarly, run the remote voltage sense lines

SENSE+ and SENSE- close to each other. Do not

cross these critical signal lines through power cir-

cuitry. Sense the current right at the pads of cur-

rent-sense resistors.

tors, driver output of the MAX5038/MAX5041,

MOSFET gates and PGND pin. Minimize the loop

diode, bootstrap capacitor, MAX5038/MAX5041,

and upper MOSFET gate.

8) Place the bank of output capacitors close to the load.

9) Distribute the power components evenly across the

board for proper heat dissipation.

10) Provide enough copper area at and around the

switching MOSFETs, inductor, and sense resistors

to aid in thermal dissipation.

11) Use at least 4oz copper to keep the trace induc-

tance and resistance to a minimum. Thin copper PC

boards can compromise efficiency since high cur-

rents are involved in the application. Also, thicker

copper conducts heat more effectively, thereby

reducing thermal impedance.

Chip Information

TRANSISTOR COUNT: 5431

PROCESS: BiCMOS

C

fR

CFF

PCF

=

×× ×

1

2

π

C

fR

CF

ZCF

=

×× ×

1

2

π

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

CLKIN

CLKOUT

BST2

DH2

LX2

DL2

EN

PGND

IN

DL1

LX1

DH1

BST1

CSN1

CSP1

EAOUT

EAN

DIFF

SENSE-

SENSE+

CLP1

SGND

CLP2

PLLCMP

PHASE

CSN2

CSP2

SSOP

TOP VIEW

MAX5038A

MAX5041A

Pin Configuration

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(31)