Serial-Data Output

The serial-data output, DOUT, is the internal shift regis-

ter’s output. DOUT allows for daisy chaining of devices

and data readback. The MAX5154/MAX5155 can be

programmed to shift data out of DOUT on SCLK’s

falling edge (Mode 0) or on the rising edge (Mode 1).

Mode 0 provides a lag of 16 clock cycles, which main-

tains compatibility with SPI/QSPI and Microwire inter-

faces. In Mode 1, the output data lags 15.5 clock

cycles. On power-up, the device defaults to Mode 0.

User-Programmable Logic Output (UPO)

UPO allows an external device to be controlled through

the serial interface (Table 1), thereby reducing the

number of microcontroller I/O pins required. On power-

up, UPO is low.

Power-Down Lockout Input (P

PD

DL

L)

The power-down lockout pin (PDL) disables software

shutdown when low. When in shutdown, transitioning

PDL from high to low wakes up the part with the output

set to the state prior to shutdown. PDL can also be

used to asynchronously wake up the device.

Daisy Chaining Devices

Any number of MAX5154/MAX5155s can be daisy

chained by connecting the DOUT pin of one device to

the DIN pin of the following device in the chain (Figure 7).

Since the MAX5154/MAX5155’s DOUT pin has an inter-

nal active pull-up, the DOUT sink/source capability

determines the time required to discharge/charge a

specifications in the

Electrical Characteristics.

Figure 8 shows an alternate method of connecting sev-

eral MAX5154/MAX5155s. In this configuration, the

data bus is common to all devices; data is not shifted

through a daisy chain. More I/O lines are required in

this configuration because a dedicated chip-select

input (CS) is required for each IC.

__________Applications Information

Unipolar Output

Figure 9 shows the MAX5154/MAX5155 configured for

unipolar, rail-to-rail operation with a gain of +2V/V. The

MAX5154 can produce a 0V to 4.096V output with

2.048V reference (Figure 9), while the MAX5155 can

produce a range of 0V to 2.5V with a 1.25V reference.

Table 2 lists the unipolar output codes. An offset to the

output can be achieved by connecting a voltage to

the output values will range between 1V and (1V +

Low-Power, Dual, 12-Bit Voltage-Output DACs

with Serial Interface

Table 2. Unipolar Code Table (Gain = +2)

MAX5154

MAX5155

DAC_

GAIN = +2V/V

REF_

OUT_

OS_

DGND

AGND

+5V/+3V

R

R

Figure 9. Unipolar Output Circuit (Rail-to-Rail)

MAX5154

MAX5155

DAC _

AGND

DGND

REF_

OUT_

OS_

+5V/+3V

R

R

______________________________________________________________________________________

13

ANALOG OUTPUT

1111 1111 1111 (0)

1000 0000 0001 (0)

DAC CONTENTS

MSB

LSB

1000 0000 0000 (0)

0111 1111 1111 (0)

0000 0000 0000 (0)

0V

0000 0000 0001 (0)

+V

4095

4096

2

REF









x

+V

2049

4096

REF









x 2

+V

2048

4096

V

REF

REF









=

x 2

+V

2047

4096

REF









x 2

+V

1

4096

REF









x 2

Figure 10. Setting OS_ for Output Offset

Note: ( ) are for the sub bit.