S8204B datasheet(11/36 Pages) SII

11 / 36 page

BATTERY PROTECTION IC FOR 3-SERIES OR 4-SERIES CELL PACK

Rev.3.7_00

S-8204B Series

Seiko Instruments Inc.

3. 7 CIT pin detection voltage (VCIT)

The CIT pin detection voltage (VCIT) is the voltage at the CIT pin when the DOP pin's voltage is set to "L" (voltage

VDS

× 0.1 V or less) after increasing the CIT pin's voltage gradually, after setting VVINI = VDIOV1 max. + 0.05 V from

the initial status.

3. 8 Load short-circuit detection delay time (tSHORT)

Load short-circuit detection delay time (tSHORT) is a period in which the VINI pin's voltage changes from "H" to "L"

by changing the VINI pin's voltage instantaneously from the initial status to VSHORT max.

+ 0.05 V.

4. 0 V battery charge starting voltage (0 V battery charge function "available"), 0 V battery charge

inhibition battery voltage (0 V battery charge function "unavailable")

(Test circuit 2)

Confirm both COP pin and DOP pin are in "H" (its voltage level is VDS

× 0.9 V or more) after setting VVMP = VSEL =

VCTLC = VCTLD = VDD, VVINI = VSS, CCT pin = Open, CDT pin = Open, CIT pin = Open, V1 = V2 = V3 = V4 = 3.5 V.

(This status is referred to as initial status.)

According to user's selection of the function to charge 0 V battery, either function of voltage for start charging 0 V

battery or battery voltage for inhibit charging 0 V battery is applied to each product.

4. 1 0 V battery charge starting voltage (V0CHA) (0 V battery charge function "available")

0 V battery charge starting voltage (V0CHA) is a voltage at V1; when a voltage at the COP pin is set to "H" after

increasing a voltage at V1 gradually, after setting V1 = V2 = V3 = V4 = 0 V from the initial status.

4. 2 0 V battery charge inhibition battery voltage (V0INH) (0 V battery charge function "unavailable")

0 V battery charge inhibition battery voltage (V0INH) is a voltage at V1; when a voltage at the COP pin is set to "L"

after decreasing a voltage at V1 gradually from the initial status.

5. Resistance between VMP pin and VDD pin, resistance between VMP pin and VSS pin, VC1 pin

current, VC2 pin current, VC3 pin current, VC4 pin current, CTLC pin current "H", CTLC pin

current "L", CTLD pin current "H", CTLD pin current "L", SEL pin current "H", SEL pin current

"L", COP pin source current, COP pin leakage current, DOP pin source current, DOP pin sink

current

(Test circuit 4)

Set VCTLC = VCTLD = VVMP = VSEL = VDD, VVINI = VSS, V1 = V2 = V3 = V4 = 3.5 V, set other pins open. (This status is

referred to as initial status.)

5. 1 Resistance between VMP pin and VDD pin (RVMD)

The value of resistance between VMP pin and VDD pin (RVMD) can be defined by RVMD = VDS / IVMD by using the

VMP pin's current (IVMD) when VVINI = 1.5 V and VVMP = VSS after the initial status.

5. 2 Resistance between VMP pin and VSS pin (RVMS)

The value of resistance between VMP pin and VSS pin (RVMS) can be defined by RVMS = VDS / IVMS by using the

VMP pin's current (IVMS) when V1 = V2 = V3 = V4 = 1.8 V after the initial status.

5. 3 VC1 pin current (IVC1), VC2 pin current (IVC2), VC3 pin current (IVC3), VC4 pin current (IVC4)

In the initial status, each current flows in the VC1 pin, VC2 pin, VC3 pin, VC4 pin is the VC1 pin current (IVC1), the

VC2 pin current (IVC2), the VC3 pin current (IVC3), the VC4 pin current (IVC4), respectively.

5. 4 CTLC pin current "H" (ICTLCH), CTLC pin current "L" (ICTLCL)

In the initial status, a current which flows in the CTLC pin is the CTLC pin current "H" (ICTLCH). After that,

decreasing a voltage at the CTLC pin gradually, the maximum current which flows in the CTLC pin is; the CTLC

pin current "L" (ICTLCL).

S8204B Datasheet(PDF) 11 Page - Seiko Instruments Inc

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