SEQ and Power OK (POK)

The SEQ pin controls the power-up sequence. If SEQ is

low, the positive output is disabled until the negative

output is within 90% of its regulation point. If SEQ is

high, the negative output is disabled until the positive

output is within 90% of its regulation point. The power-

OK output (POK) indicates that both output voltages

are in regulation. When both outputs are within 90% of

their regulation points, POK becomes high impedance.

Should one or both of the output voltages fall below

90% of their regulation points, POK pulls to ground.

POK can sink up to 2mA. To reduce current consump-

tion, POK is high impedance while the part is in shut-

down. When coming out of shutdown, POK remains

high impedance for 50ns (typ) before going low.

Ω resistor.

Synchronization/Internal

Frequency Selection

The MAX685 operates at a fixed switching frequency.

Set the operating frequency using the SYNC pin. If

SYNC is grounded, the part operates at the internally set

the part operates at 400kHz. The MAX685 can also be

synchronized to signals between 200kHz and 480kHz.

Note that each output switches at half the oscillator or

synchronized frequency. Since the actual switching fre-

quency is one-half the applied clock signal, drive SYNC

at twice the desired switching frequency.

Dual-Output (Positive and Negative),

DC-DC Converter for CCD and LCD

_______________________________________________________________________________________

7

Figure 1. Functional Diagram

NEGATIVE

ERROR

AMP

FBN

FBP

REF

POSITIVE

ERROR

AMP

1.25V

REF

CONTROL

LOGIC

POK

VP

P

N

PGND

GND

SYNC

SEQ

SHDN

LXN

D2

D1

LXP

MAX685

+15V

+5V

0V

0V

-7.5V

LXN

LXP

Figure 2. LXN and LXP Waveforms (see also Figure 5)