_______________Detailed Description

Reset Output

A microprocessor’s (µP’s) reset input starts the µP in a

known state. These

µP supervisory circuits assert reset

to prevent code-execution errors during power-up,

power-down, or brownout conditions. They also provide

a reset timeout delay that is pin programmable to 1ms

(max), 20ms (min), or 100ms (min). This feature allows

flexibility in designing bar-code scanners, hand-held

devices, and other applications that require quick or

nonstandard power-up times.

The MAX821’s RESET output is guaranteed to be a

threshold, an internal timer keeps RESET low for the

reset timeout period, as determined by the Set Reset

Timeout (SRT) input. See the Setting the Reset Timeout

Delay section.

below the reset threshold, the internal timer resets to

zero, and RESET goes low. The internal timer begins

and RESET remains low for the reset timeout period.

The MAX822 has an active-high RESET output that is

the inverse of the MAX821’s RESET output.

Setting the Reset Timeout Delay

Use the three-level Set Reset Timeout (SRT) input to set

the reset timeout delay. Connect SRT to GND for a 1ms

or leave it unconnected for a 100ms (min) delay.

If you choose to drive the SRT pin with an external sig-

nal, make sure the signal source can charge/discharge

the capacitance on SRT quickly enough (<500µs) to

avert an unintended reset timeout delay.

To ensure proper operation when selecting the 100ms

timeout (SRT = unconnected), minimize capacitive

loading on the SRT pin (< 200pF). Excessive capacitive

loading can select an unintended faster timeout mode.

Reset Threshold Accuracy

The MAX821/MAX822 are designed to meet their worst-

case specifications over their entire operating tempera-

ture range. Choose a reset threshold guaranteed to

assert at a voltage below the power supply’s regulation

range and above the minimum specified operating volt-

age range for the system’s ICs.

__________Applications Information

While designed to issue a reset to the microprocessor

(µP) during power-up, power-down, and brownout con-

ditions, the MAX821/MAX822 are relatively immune to

Figure 1 shows the maximum transient duration vs. reset

comparator overdrive for which the MAX821/MAX822

typically do not generate a reset pulse. This graph was

starting above the actual reset threshold and ending

below it by the magnitude indicated (reset comparator

overdrive). The graph indicates the typical maximum

without causing a reset pulse to be issued. As the mag-

nitude of the transient increases (goes farther below the

reset threshold), the maximum allowable pulse width

transient that goes 100mV below the reset threshold and

lasts 12µs or less will not cause a reset pulse to be

issued. A 0.1µF capacitor mounted as close as possible

desired.

4-Pin µP Voltage Monitors with Pin-Selectable

Power-On Reset Timeout Delay

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5

300

250

0

1

10

100

1000

50

100

150

200

Figure 1. Maximum Transient Duration Without Causing a

Reset Pulse vs. Comparator Overdrive