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CHA2097A Datasheet(PDF) 7 Page - United Monolithic Semiconductors |
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CHA2097A Datasheet(HTML) 7 Page - United Monolithic Semiconductors |
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7 / 8 page ![]() 20-40GHz Variable Gain Amplifier CHA2097a Ref. : DSCHA20978021-21 Jan 08 7/8 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 Typical Bias Tuning The circuit schematic is given below: Attenuator IN OUT Vd2,3 Vg 3 Vg1 Vd1 Vg 2 Vctrl For gain control operation, the three drain biases are connected altogether. In a same way, all the gate biases are connected together at the same power supply, tuned to drive a small signal operating current of 140mA. A separate access to the gate voltages of each stage (Vg1, 2, 3) is provided for fine tuning of the stages regarding the application. An additional pad is provided (Vctrl) to control the gain of the circuit, driving two cold transistors in attenuator arrangement. |
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