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MIC2010 Datasheet(PDF) 5 Page - Micrel Semiconductor |
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MIC2010 Datasheet(HTML) 5 Page - Micrel Semiconductor |
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5 / 9 page ![]() September 2000 5 MIC2010/2070 MIC2010 Micrel Symbol Parameter Condition Min Typ Max Units V OH FAULT1, 2 Output High Voltage I FAULT = –20µA4 V (MIC2010-1P, 2P), (MIC2070-1P, 2P) T H MAIN to S3# Hold Time, Note 7 Figure 5 5 ms T S MAIN to S3# Set-up Time, Note 7 Figure 5 0 ms t DLY FAULT Delay Filter Response Time Output shorted to ground, Figure 4 5 10 20 ms (Overcurrent only), Note 8 t OC Overcurrent Response Time Output shorted to ground, Figure 4 MAIN output 2 µs AUX output 2 µs t ON(MAIN) MAIN Output Turn-On Time R L = 10Ω, CL = 1µF, Figure 3 2 ms t OFF(MAIN) MAIN Output Turn-Off Time R L = 10Ω, CL = 1µF, Figure 3 35 µs t r(MAIN) MAIN Output Rise Time R L = 10Ω, CL = 1µF, Figure 3 2 ms t f(MAIN) MAIN Output Fall Time R L = 10Ω, CL = 1µF, Figure 3 32 µs t ON(AUX) AUX Output Turn-On Time R L = 50Ω, CL = 1µF, Figure 3 0.6 ms t OFF(AUX) AUX Output Turn-Off Time R L = 50Ω, CL = 1µF, Figure 3 120 µs t r(AUX) AUX Output Rise Time R L = 50Ω, CL = 1µF, Figure 3 0.5 ms t f(AUX) AUX Output Fall Time R L = 50Ω, CL = 1µF, Figure 3 115 µs t XMA MAIN to AUX S3# transition to 0 5 7.5 ms Cross Conduction Time, Note 9 t XAM AUX to MAIN S3# transition to 1 5 7.5 ms Cross Conduction Time, Note 9 Note 1. Exceeding the absolute maximum rating may damage the device. Note 2. The device is not guaranteed to function outside its operating rating. Note 3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF. Note 4. All voltages are referenced to ground. Note 5. For MIC2070-1(P) OFF occurs when V EN < 0.8V and ON occurs when VEN > 2.4V. For MIC2070-2(P) OFF occurs when VEN > 2.4V and ON occurs when V EN < 0.8V. Note 6. Current-limit threshold is defined by the current-limit factor divided by R SET. Note 7. Guaranteed by design. Not production tested. Note 8. Assumes only one channel in current-limit. Delay circuitry is shared among channels so it is possible for t DLY to be 40ms max if one channel enters current-limit as the other is about to time-out. Note 9. Cross conduction time is the duration in which both MAIN and AUX internal switches are on subsequent to S3# transitioning. Test Circuit Device Under Test CL OUT RL VOUT IOUT Timing Diagram 90% VOUT 10% 90% 10% tr tf |
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