2

FN8174.4

July 18, 2014

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Pin Configuration

X9271

14 LD TSSOP

TOP VIEW

Ordering Information

PART NUMBER

(Notes 2, 3)

PART

MARKING

(V)

POTENTIOMETER

ORGANIZATION (kΩ)

TEMP. RANGE

(°C)

PACKAGE

Pb-Free

PKG.

DWG. #

X9271UV14IZ (Note 1)

X9271 UVZI

5 ±10%

50

-40 to +85

14 Ld TSSOP (4.4mm)

M14.173

X9271UV14Z (Note 1)

X9271 UVZ

5 ±10%

50

0 to +70

14 Ld TSSOP (4.4mm)

M14.173

X9271UV14IZ-2.7

X9271 UVZG

2.7 to 5.5

50

-40 to +85

14 Ld TSSOP (4.4mm)

M14.173

X9271UV14IZ-2.7T1

X9271 UVZG

2.7 to 5.5

50

-40 to +85

14 Ld TSSOP (4.4mm)

M14.173

X9271UV14Z-2.7

X9271 UVZF

2.7 to 5.5

50

0 to +70

14 Ld TSSOP (4.4mm)

M14.173

X9271UV14Z-2.7T1

X9271 UVZF

2.7 to 5.5

50

0 to +70

14 Ld TSSOP (4.4mm)

M14.173

NOTES:

1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.

2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte

tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil

Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

3. For Moisture Sensitivity Level (MSL), please see device information page for X9271. For more information on MSL please see Tech Brief TB363.

1

2

3

4

5

6

78

14

13

12

11

10

9

A0

SCK

CS

S0

NC

SI

HOLD

WP

A1

Pin Descriptions

PIN NUMBER

PIN NAME

FUNCTION

1SO

Serial Data Output

2

A0

Device Address

3

NC

No Connect

4CS

Chip Select

5

SCK

Serial Clock

6

SI

Serial Data Input

System Ground

8WP

Hardware Write Protect

9

A1

Device Address

10

HOLD

Device Select. Pause the serial bus.

11

Wiper Terminal of Potentiometer

12

High Terminal of Potentiometer

13

Low Terminal of Potentiometer

14

System Supply Voltage

X9271