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ISL26321 Datasheet(PDF) 19 Page - Intersil Corporation

Part # ISL26321
Description  12-bit, 250kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels
PDF  23 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL26321 Datasheet(HTML) 19 Page - Intersil Corporation

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ISL26320, ISL26321, ISL26322, ISL26323, ISL26324, ISL26325, ISL26329
19
FN8273.1
September 5, 2013
FIGURE 34. TIMING DIAGRAM FOR READING DURING CONVERSION MODE WITH EOC ON SDO OUTPUT
FIGURE 35. TIMING DIAGRAM FOR READING SPANNING CONVERSIONS MODE WITH EOC ON SDO OUTPUT
FIGURE 36. TIMING DIAGRAM FOR READING AFTER CONVERSION WITH REGISTER READBACK, WITHOUT EOC
Idle
Idle
CNV
SCLK
SDI
SDO
D15
D14
. . .
. . .
D14
. . .
. . .
ADC STATE
Idle
Power-Up
Acquisition
Conversion
Acquisition
Conversion
tACQ
tSCLK
tCNV_CLK
tSCLKL
tDATA
tCNV
Conversion N
Conversion N+1
Configuration N+1
Conversion Result N-1
Configuration N+2
Conversion Result N
tSCLKH
MSB
MSB-1
D1
LSB
MSB
MSB-1
D1
tSDO_V
tSDI_H
tSDI_SU
Hi-Z State
D5
D4
D5
D4
Idle
CNV
SCLK
SDI
SDO
D15
D4
ADC STATE
Idle
Power-Up
Acquisition
Conversion
Idle
Acquisition
Conversion
tACQ
tSCLK
tCNV_SCLK
tSCLKL
Conversion N
Conversion N+1
Configuration N+1
Conversion Result N-1
Configuration N+2
Conversion Result N
tSCLKH
MSB
MSB-1
D1
LSB
Hi-Z State
MSB
MSB-1
D1
tSDO_V
tSDI_H
tSDI_SU
D15
D14
D4
. . .
MSB-1 MSB-2
. . .
MSB-1
MSB-2
Note: Transition from Acquisition to Conversion mode may occur after any integer number of clock cycles (provided that the minimum tACQ is satisfied).
tDATA
tCNV
D14
. . .
D12
D13
D12
D13
. . .
CNV
SCLK
SDI
SDO
MSB
MSB-1
D15
D14
. . .
. . .
D1
LSB
ADC STATE
Idle
Power-Up
Acquisition
Conversion
Idle
Configuration N+1
Conversion Result N-1
Hi-Z State
Conversion N
Cfg15
Cfg14
. . .
Cfg1
Cfg0
Configuration settings of N-1 Result
D5
D4



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