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24C64 Datasheet(PDF) 8 Page - Microchip Technology |
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24C64 Datasheet(HTML) 8 Page - Microchip Technology |
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8 / 12 page ![]() 25AA640/25LC640/25C640 DS21223A-page 8 Preliminary © 1997 Microchip Technology Inc. 3.4 Write Enable (WREN) and Write Disable (WRDI) The 25xx640 contains a write enable latch. See Table 3-3 for the Write Protect Functionality Matrix. This latch must be set before any write operation will be completed internally. The WREN instruction will set the latch, and the WRDI will reset the latch. The following is a list of conditions under which the write enable latch will be reset: • Power-up • WRDI instruction successfully executed • WRSR instruction successfully executed • WRITE instruction successfully executed FIGURE 3-4: WRITE ENABLE SEQUENCE FIGURE 3-5: WRITE DISABLE SEQUENCE SCK 0 2 3 4 5 6 7 1 SI high impedance SO CS 0 1 0 0 0 0 0 1 SCK 0 2 3 4 5 6 7 1 SI high impedance SO CS 0 1 0 0 0 0 0 10 |
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