TC500 datasheet(9/28 Pages) MICROCHIP

9 / 28 page

DS21428B-page 9

TC500/A/510/514

FIGURE 4-1:

TYPICAL DUAL SLOPE A/D CONVERTER SYSTEM TIMING

Auto-Zero

Integrate

Full Scale Input

Reference

De-integrate

Overshoot Integrator

Output

Zero

Converter Status

TTIME

Integrator

Voltage

Comparator

Output

AB Inputs

Controller

Operation

Notes:

Comparator Delay

Begin Conversion with

Auto-Zero Phase

(Positive Input Shown)

Sample Input Polarity

The length of this phase is chosen almost arbitrarily

but needs to be long enough to null out worst case errors

(see text).

Minimizing

Overshoot

will Minimize

I.O.Z. Time

Ready for Next

Conversion

(Auto-Zero is

Idle State)

Time Input

Integration

Phase

Capture

De-integration

Time

Integrator

Output

Zero Phase

Complete

Undefined

A = 0

B = 1

A = 1

0 For Negative Input

1 For Postive Input

B = 0

B = 1

B = 0

A = 1

A = 0

VINT

Typically = TINT

TINT

Comparator Delay +

Processor Latency

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