TC7126ACPL datasheet(12/22 Pages) MICROCHIP

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TC7126/A

DS21458B-page 12

6.5

Oscillator Components

COSC should be 50pF; ROSC is selected from the

equation:

EQUATION 6-2:

For a 48kHz clock (3 conversions per second),

R = 180k

Ω.

Note that FOSC is 44 to generate the TC7126A's inter-

nal clock. The backplane drive signal is derived by

dividing FOSC by 800.

To achieve maximum rejection of 60Hz noise pickup,

the signal integrate period should be a multiple of

60Hz. Oscillator frequencies of 24kHz, 12kHz, 80kHz,

60kHz, 40kHz, etc. should be selected. For 50Hz rejec-

tion,

oscillator

frequencies

20kHz,

100kHz,

66-2/3kHz, 50kHz, 40kHz, etc. would be suitable. Note

that 40kHz (2.5 readings per second) will reject both

50Hz and 60Hz.

6.6

Reference Voltage Selection

A full scale reading (2000 counts) requires the input

signal be twice the reference voltage.

Note:

VFS =2VREF.

In some applications, a scale factor other than unity

may exist between a transducer output voltage and the

required digital reading. Assume, for example, a pres-

sure transducer output for 2000lb/in2 is 400mV. Rather

than dividing the input voltage by two, the reference

voltage should be set to 200mV. This permits the trans-

ducer input to be used directly.

Thedifferential reference canalsobeusedwherea

digital zero reading is required when VIN is not equal to

zero. This is common in temperature measuring instru-

mentation. A compensating offset voltage can be

applied between analog common and VIN-. The trans-

ducer output is connected between VIN+ and analog

common.

7.0

DEVICE PIN FUNCTIONAL

DESCRIPTION

(Pin Numbers Refer to the 40-Pin PDIP.)

7.1

Differential Signal Inputs

VIN+(Pin31), VIN-(Pin 30)

The TC7126A is designed with true differential inputs

and accepts input signals within the input stage

Common mode voltage range (VCM). Typical range is

V+ – 1V to V- + 1V. Common mode voltages are

removed from the system when the TC7126A operates

from a battery or floating power source (isolated from

measured system), and VIN- is connected to analog

common (VCOM) (seeFigure7-2).

In systems where Common mode voltages exist, the

TC7126A's 86 dB Common mode rejection ratio mini-

mizes error. Common mode voltages do, however,

affect the integrator output level. A worst case condition

exists if a large positive VCM exists in conjunction with

a full scale negative differential signal. The negative

signal drives the integrator output positive along with

VCM (see Figure 7-1). For such applications, the inte-

grator output swing can be reduced below the recom-

mended 2V full scale swing. The integrator output

will swing within 0.3V of V+ or V- without increased

linearity error.

FIGURE 7-1:

COMMON MODE

VOLTAGE REDUCES

AVAILABLE INTEGRATOR

SWING (VCOM ≠ VIN)

Required Full Scale Voltage*

VREF

20mV

100mV

FOSC =

0.45

–

VIN

Integrator

VI =

[

VCM – VIN

Input

Buffer

CI = Integration capacitor

RI = Integration resistor

4000

FOSC

tI = Integration time =

Where:

–

RI CI

VCM

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