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LX1668CDW Datasheet(PDF) 2 Page - Microsemi Corporation |
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LX1668CDW Datasheet(HTML) 2 Page - Microsemi Corporation |
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2 / 15 page ![]() PROGRAMMABLE MULTIPLE OUTPUT DC:DC CONTROLLER LX1668 PRODUCT DA T ABOOK 1996/1997 Copyright © 1999 Rev. 1.0 4/99 2 P RODUCTION D ATA S HEET 12V Supply Voltage (V CC12) .................................................................................. 18V 5V Supply Voltage (V CC5) ....................................................................................... 7V Supply Voltage (Internal LDO)/(V CC3) ................................................................... 7V Output Drive Peak Current Source (500ns) ....................................................... 1.0A Output Drive Peak Current Sink (500ns) ........................................................... 1.0A Input Voltage (SS, VID[0:4]) ................................................................... -0.3V to 6V Operating Junction Temperature .................................................................... 150°C Storage Temperature Range ........................................................... -65°C to +150°C Lead Temperature (Soldering, 10 Seconds) .................................................... 300°C Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Note 2. V CC3 supply is used as input to internal low dropout regulator. Voltages above 3.3V will cause increased thermal dissipation in the package. Power dissipation should be limited to keep junction temperature below maximum rating. DW PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θθθθθ JA 85°C/W PW PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θθθθθ JA 110°C/W Junction Temperature Calculation: T J = TA + (PD x θJA). The θ JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. THERMAL DATA ABSOLUTE MAXIMUM RATINGS (Note 1 & 2) PACKAGE PIN OUTS PW PACKAGE — 20-Pin (Top View) PGND BDRV AGND SS/ENABLE V FB V CORE PWRGD OVP VID4 VID3 1 20 219 318 417 516 615 714 813 912 10 11 TDRV V CC12 V CC5 V OUT2 V CC3 L DRV L FB VID0 VID1 VID2 TDRV V CC12 V CC5 V OUT2 V CC3 L DRV L FB VID0 VID1 VID2 PGND BDRV AGND SS/ENABLE V FB V CORE PWRGD OVP VID4 VID3 DW PACKAGE — 20-Pin (Top View) 1 20 219 318 417 516 615 714 813 912 10 11 |
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