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MT8950 Datasheet(PDF) 7 Page - Mitel Networks Corporation

Part # MT8950
Description  ISO-CMOS ST-BUS??FAMILY Data Codec
PDF  16 Pages
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Manufacturer  MITEL [Mitel Networks Corporation]
Direct Link  http://www.mitel.com
Logo MITEL - Mitel Networks Corporation

MT8950 Datasheet(HTML) 7 Page - Mitel Networks Corporation

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ISO-CMOS
MT8950
6-9
Figure 4 - Example Input/Output Waveform in the RZ format (DF=HIGH)
NRZ
Equivalent
Bipolar RZ
Equivalent
RxE
DX1 Input
MARK Pulses
(Polarity
Established)
DX2 Input
SPACE Pulses.
MARK
MARK
SPACE
SPACE
D
D
D
DV
V
VV
VV
DD
DD
DD
DD
Signal Regenerated at Remote End
DR2 Output
MARK Pulses
DR1 Output
SPACE Pulses
Establishes MARK polarity. See text for complete explanation.
52
µs. Nom. or
104
µs. Nom. or
> 125
µs
52
µs. Nom. or
104
µs. Nom. or
> 125
µs
4
µs. Min.
Tb Max.
35
µs. Nom.
35
µs. Nom.
125
µs.
Min.
125
µs. Min.
125
µs.
Min.
Tb = Bit Period
V = Violations Pulse; D = Data Pulse
word on the first rising edge of the clock after F1i
and CA are taken low.
The 8 bit TEM word from
the input ST-BUS stream is clocked into the device
on the negative edge of the C2i clock. For proper
codec operation, the ST-BUS interface (DSTo, DSTi,
and CSTi) should be enabled for only 8 clock periods
of the C2i clock in any 125µs period (one ST-BUS
frame time) as shown in Figure 11.
All data input
and output at the ST-BUS interface takes place at
2.048 Mbps.
Figure 5 - Example Input/Output Waveform in the NRZ format (DF=LOW)
DX2
Secondary
Input
Signal Regenerated at Remote End
52
µs. Nom. or
104
µs. Nom. or
> 125
µs
MARK
MARK
MARK
MARK
SPACE
SPACE
SPACE
SPACE
125
µs. Min.
DX1
NRZ Input
DR1
Data
Output
DR2
Secondary
Output
4
µs. Min.
121
µs. Max.
Each transition on this output denotes a pulse input at DX2 on the remote end
125
µs.
Min.



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