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SM5878AM Datasheet(PDF) 3 Page - Nippon Precision Circuits Inc |
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SM5878AM Datasheet(HTML) 3 Page - Nippon Precision Circuits Inc |
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3 / 16 page ![]() SM5878AM/AV NIPPON PRECISION CIRCUITS—3 BLOCK DIAGRAM PIN DESCRIPTION Number Name I/O Description 1 MUTE Ip When MODE is HIGH: Soft mute ON/OFF control. Mute is active when HIGH. When MODE is LOW: Attenuator level direction control. The attenuator direction is down when HIGH. 2 DEEM Ip Deemphasis control. Deemphasis is ON when HIGH, and OFF when LOW. 3 CKO O 16.9344 MHz clock output 4 DVSS - Digital ground 5 BCKI Ip Bit clock input 6 DI Ip Serial data input 7 DVDD - Digital supply 8 LRCI Ip Input sample data rate (fs) clock input pin. Left-channel input when HIGH, and right-channel input when LOW. 9 TSTN Ip Test pin. Test mode when LOW. Filter & attenuation operation block Noise shaper operation block Input interface + − + − Attenuation counter Timing control LRCI DI BCKI LO AVSS RO MODE ATCK MUTE RSTN DS DVSS DVDD TSTN TO1 AVDDL DEEM CKO XVSS XTO XTI XVDD AVDDR LR LR MUTEO 11Level DEM DAC 11Level DEM DAC 11Level DEM DAC 11Level DEM DAC |
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