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PXA255 Datasheet(PDF) 13 Page - Intel Corporation

Part # PXA255
Description  PXA255 Processor
PDF  40 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

PXA255 Datasheet(HTML) 13 Page - Intel Corporation

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Package Information
Intel® PXA255 Processor Electrical, Mechanical, and Thermal Specification
13
FFRI/
GPIO[38]
ICOCZ
Full function UART ring indicator. (input)
Pulled High -
Note[1]
Note [3]
FFDTR/
GPIO[40]
ICOCZ
Full function UART data-terminal-ready. (output)
Pulled High -
Note[1]
Note [3]
FFRTS/
GPIO[41]
ICOCZ
Full function UART request-to-send. (output)
Pulled High -
Note[1]
Note [3]
Bluetooth UART Pins
BTRXD/
GPIO[42]
ICOCZ
Bluetooth UART receive. (input)
Pulled High -
Note[1]
Note [3]
BTTXD/
GPIO[43]
ICOCZ
Bluetooth UART transmit. (output)
Pulled High -
Note[1]
Note [3]
BTCTS/
GPIO[44]
ICOCZ
Bluetooth UART clear-to-send. (input)
Pulled High -
Note[1]
Note [3]
BTRTS/
GPIO[45]
ICOCZ
Bluetooth UART request-to-send. (output)
Pulled High -
Note[1]
Note [3]
Standard UART and ICP Pins
IRRXD/
GPIO[46]
ICOCZ
IrDA receive signal. (input) Receive pin for the FIR
function.
Standard UART receive. (input)
Pulled High -
Note[1]
Note [3]
IRTXD/
GPIO[47]
ICOCZ
IrDA transmit signal. (output) Transmit pin for the
Standard UART, SIR and FIR functions.
Standard UART transmit. (output)
Pulled High -
Note[1]
Note [3]
Hardware UART Pins
HWRXD/
GPIO[42/49]
ICOCZ
Hardware UART receive. (input)
Pulled High -
Note[1]
Note [3]
HWTXD/
GPIO[43/48]
ICOCZ
Hardware UART transmit. (output)
Pulled High -
Note[1]
Note [3]
HWCTS/
GPIO[44/50]
ICOCZ
Hardware UART clear-to-send. (input)
Pulled High -
Note[1]
Note [3]
HWRTS/
GPIO[45/51]
ICOCZ
Hardware UART data-terminal-ready. (output)
Pulled High -
Note[1]
Note [3]
MMC Controller Pins
MMCMD
ICOCZ
Multimedia card command. (bidirectional)
Hi-Z
Hi-Z
MMDAT
ICOCZ
Multimedia card data. (bidirectional)
Hi-Z
Hi-Z
nPCE[2]/
GPIO[53]
ICOCZ
PCMCIA card enable 2. (outputs) Selects a PCMCIA
card. Bit one enables the high byte lane and bit zero
enables the low byte lane.
MMC clock. (output) Clock signal for the MMC controller.
Pulled High -
Note[1]
Note [5]
L_DD[9]/
GPIO[67]
ICOCZ
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
MMC chip select 0. (output) Chip select 0 for the MMC
controller.
Pulled High -
Note[1]
Note [3]
Table 3. Pin and Signal Descriptions for the PXA255 Processor (Sheet 5 of 9)
Pin Name
Type
Signal Descriptions
Reset State
Sleep State



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