PIC16F84A datasheet(10/68 Pages) MICROCHIP

10 / 68 page

PIC16F84A

DS35007A-page 10

Preliminary

2.2.2.3

INTCON REGISTER

The INTCON register is a readable and writable

interrupt sources.

FIGURE 2-1:

INTCON REGISTER (ADDRESS 0Bh, 8Bh)

Note:

Interrupt ﬂag bits get set when an interrupt

condition occurs regardless of the state of

its corresponding enable bit or the global

enable bit, GIE (INTCON<7>).

R/W-0

R/W-x

GIE

EEIE

T0IE

INTE

RBIE

T0IF

INTF

RBIF

= Readable bit

W = Writable bit

= Unimplemented bit,

read as ‘0’

- n = Value at POR reset

bit7

bit0

bit 7:

GIE: Global Interrupt Enable bit

1 = Enables all un-masked interrupts

0 = Disables all interrupts

Note: For the operation of the interrupt structure, please refer to Section •.

bit 6:

EEIE: EE Write Complete Interrupt Enable bit

1 = Enables the EE write complete interrupt

0 = Disables the EE write complete interrupt

bit 5:

T0IE: TMR0 Overﬂow Interrupt Enable bit

1 = Enables the TMR0 interrupt

0 = Disables the TMR0 interrupt

bit 4:

INTE: RB0/INT Interrupt Enable bit

1 = Enables the RB0/INT interrupt

0 = Disables the RB0/INT interrupt

bit 3:

RBIE: RB Port Change Interrupt Enable bit

1 = Enables the RB port change interrupt

0 = Disables the RB port change interrupt

bit 2:

T0IF: TMR0 Overﬂow Interrupt Flag bit

1 = TMR0 has overﬂowed (must be cleared in software)

0 = TMR0 did not overﬂow

bit 1:

INTF: RB0/INT Interrupt Flag bit

1 = The RB0/INT interrupt occurred

0 = The RB0/INT interrupt did not occur

bit 0:

RBIF: RB Port Change Interrupt Flag bit

1 = When at least one of the RB7:RB4 pins changed state (must be cleared in software)

0 = None of the RB7:RB4 pins have changed state

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