LM90

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SNIS126A – MAY 2004 – REVISED MARCH 2013

Figure 18. Compensating for an Untargeted Non-Ideality Factor

Temperature errors associated with non-ideality may be reduced in a specific temperature range of concern

through use of the offset registers (11h and 12h). Figure 18 shows how the offset register may be used to

compensate for the non-ideality errors shown in Figure 17. For the case of non-ideality=1.008, the offset register

was set to

−0.5°C resulting in the calculated residual error as shown in Figure 18. This offset has resulted in an

error of less than 0.05°C for the temperatures measured in the critical range between 60 to 100°C. This method

yeilds a first order correction factor.

PCB LAYOUT for MINIMIZING NOISE

Figure 19. Ideal Diode Trace Layout

In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced

on traces running between the remote temperature diode sensor and the LM90 can cause temperature

conversion errors. Keep in mind that the signal level the LM90 is trying to measure is in microvolts. The following

guidelines should be followed:

nF capacitor as close as possible to the LM90's D+ and D

− pins. Make sure the traces to the 2.2nF capacitor

are matched.

2. The recommended 2.2nF diode bypass capacitor actually has a range of TBDpF to 3.3nF. The average

temperature accuracy will not degrade. Increasing the capacitance will lower the corner frequency where

differential noise error affects the temperature reading thus producing a reading that is more stable.

Conversely, lowering the capacitance will increase the corner frequency where differential noise error affects

the temperature reading thus producing a reading that is less stable.

3. Ideally, the LM90 should be placed within 10cm of the Processor diode pins with the traces being as straight,

short and identical as possible. Trace resistance of 1

Ω can cause as much as 1°C of error. This error can be

compensated by using the Remote Temperature Offset Registers, since the value placed in these registers

will automatically be subtracted from or added to the remote temperature reading.

4. Diode traces should be surrounded by a GND guard ring to either side, above and below if possible. This

GND guard should not be between the D+ and D

− lines. In the event that noise does couple to the diode

lines it would be ideal if it is coupled common mode. That is equally to the D+ and D

− lines.

5. Avoid routing diode traces in close proximity to power supply switching or filtering inductors.

6. Avoid running diode traces close to or parallel to high speed digital and bus lines. Diode traces should be

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