Note 5: Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8.

Note 6: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8.

AC Electrical Characteristics

V

Symbol

Parameter

T

T

T

Units

Conditions

Notes

Min

Max

Min

Max

Min

Max

t

PLH

Propagation Delay CLKIN,

0.58

0.88

0.63

0.88

0.72

1.02

ns

Figures 1, 2

(Notes 8, 9,

10)

t

PHL

CLKIN to CLK

t

PLH

Propagation Delay, TCLK

0.30

1.60

0.30

1.50

0.40

1.70

ns

t

PHL

to CLK

t

SG–G

Skew Gate to Gate (Note 12)

120

100

120

ps

(Note 10)

t

TLH

Transition Time

0.30

0.90

0.25

0.85

0.20

0.85

ns

t

THL

20% to 80%,80% to 20%

Note 8: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C, then testing immediately

after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.

Note 9: Screen tested 100% on each device at +25˚C temperature only, Subgroup A9.

Note 10: Sample tested (Method 5005, Table I) on each manufactured lot at +25˚C, Subgroup A9, and at +125˚C and −55˚C temperatures, Subgroups A10 and A11.

Note 11: Not tested at +25˚C, +125˚C and −55˚C temperature (design characterization data).

Note 12: Maximum output skew for any one device.

DS100319-3

Note 13: Shown for testing CLKIN to CLK1 in the differential mode.

Note 14: L1, L2, L3 and L4 = equal length 50

Ω impedance lines.

Note 15: All unused inputs and outputs are loaded with 50

Ω in parallel with ≤3 pF to GND.

Note 16: Scope should have 50

Ω input terminator internally.

FIGURE 1. AC Test Circuit

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