Z08617 datasheet(13/26 Pages) ZILOG

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Z08617 NMOS Z8® 8-BIT MCU

KEYBOARD CONTROLLER

FUNCTIONAL DESCRIPTION (Continued)

Interrupts. The Z08617 has six different interrupts from six

different sources. These interrupts are maskable and

prioritized (Figure 13). The six sources are divided as

follows: four sources are claimed by Port 3 lines P33-P30,

and two are claimed by the counter/timers. The Interrupt

Masked Register globally or individually enables or dis-

ables the six interrupts requests.

When more than one interrupt is pending, priorities are

resolved by a programmable priority encoder that is

controlled by the Interrupt Priority register. All inter-

rupts are vectored through locations in the program

memory. When an interrupt machine cycle is activated an

interrupt request is granted. This disables all of the subse-

quent interrupts, saves the Program Counter and status

flags, and then branches to the program memory vector

location reserved for that interrupt. This memory location

and the next byte contain the 16-bit address of the interrupt

service routine for that particular interrupt request.

To accommodate polled interrupt systems, interrupt

inputs are masked and the interrupt request register

is polled to determine which of the interrupt request

needs service.

IRQ

IMR

IPR

Priority

Logic

Global

Interrupt

Enable

Vector Select

Interrupt

Request

IRQ0-IRQ5

Figure 13. Interrupt Block Diagram

Z08617 Datasheet(PDF) 13 Page - Zilog, Inc.