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Z86228 Datasheet(PDF) 2 Page - Zilog, Inc.

Part # Z86228
Description  LINE 21 CLOSED CAPTION CONTROLLER (L21C)
PDF  7 Pages
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Manufacturer  ZILOG [Zilog, Inc.]
Direct Link  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z86228 Datasheet(HTML) 2 Page - Zilog, Inc.

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Z86228
CPS DC-4243-00
PRELIMINARY
PIN DESCRIPTION
DONF/SEN
NRESET
BOX
LUM
R
B
HFI
VSS (Digital)
LNG/SCK
CT/SDA
NSIN
VDD (Digital)
VDD (Analog)
CVI
SSL
HLF
VSS (Analog)
1
18
2
3
4
5
6
7
8
9
17
16
15
14
13
12
11
10
G
Pin No.
Signal Description
2
NRESET
Master reset for the I.C. and must be used in the
Parallel Control Mode. It may be tied High in the
Serial Mode if reset is to be performed through
the serial data stream.
18
LAG/SCK Input (control)
In Parallel Mode this input selects the Data
Channel to be processed (along with CT). CMOS
input High=LANGUAGE I, Low=LANGUAGE II.
In Serial Mode this input is Serial Clock In.
3
Box Output (Box)
Active High, CMOS level “black box” keying
signal for Caption/Text display area.
4
Luminance Output (LUM)
Active High, CMOS level signal.
Character video luminance signal.
5, 6, 7
Color signals, RGB Outputs
Active High, CMOS level color character video
for color receiver use.
15
V
DD Digital Power pin. Connect to +5V source.
14
V
DD Analog
10
V
SS Analog. Analog Ground. Connect to
system ground.
16
(NSIN) Input (Control)
Selects the mode to be used in interpreting the
signals on the three Control pins. High = Parallel
Mode, Low = Serial Mode.
18-Pin DIP Package Diagram
Pin No.
Signal Description
11
Composite Video Input (CVI)
Composite NTSC video, nominally 1.0V p-p,.
band limited to 600 kHz. Circuit operates with
signal variations between 0.7-1.4V p-p. It is
recommended that this signal pin be driven by
an emitter follower through a 0.1
µF capacitor.
12
Sync Slice Level (SSL)
Capacitor (0.1
µF) to store sync slice level
voltage.
8
H Flyback Input (HFI)
Horizontal sync input at CMOS levels, polarity
independent. Typically derived from the H
Flyback pulse or any other horizontal timing
signal.
13
H Loop Filter (HLF)
Value to be specified
9V
SS (Digital) Digital Ground
Connect to system ground
1
DONF/SEN Input (control)
In Parallel Mode this input controls the Decoder
On/Off function CMOS input with High = On,
Low = Off. In Serial Mode this input is the Enable
for serial data input.
17
CT/SDA Input (control)
In Parallel Mode this input selects the Data
Channel to be processed (along with LNG).
CMOS input with High=CAPTIONS, Low =TEXT.
In Serial mode this input is serial data input.



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