Z86L08 datasheet(14/26 Pages) ZILOG

14 / 26 page

Z86L04/L08

Z8 8-Bit Cost-Effective Microcontrollers

Zilog

P R E L I M I N A R Y

DS97LVO0901

Power-On Reset (POR). A timer circuit clocked by a ded-

icated on-board RC oscillator is used for a POR timer func-

tion. The POR time allows VCC and the oscillator circuit to

stabilize before instruction execution begins. The POR

timer circuit is a one-shot timer triggered by one of the five

following conditions:

Power bad to power good status

Stop-Mode Recovery

WDT time-out

WDT time-out (in HALT Mode)

WDT time-out (in STOP Mode)

Watch-Dog Timer Reset. The WDT is a retriggerable

one-shot timer that resets the Z8 if it reaches its terminal

count. The WDT is initially enabled by executing the WDT

instruction and is retriggered on subsequent execution of

the WDT instruction. The timer circuit is driven by an on-

board RC oscillator. If the permanent WDT option is select-

ed then the WDT is enabled after reset and operates in

RUN Mode, HALT mode, STOP mode and cannot be dis-

abled. If the permanent WDT option is not selected then

the WDT, when enabled by the user's software, does not

operate in STOP Mode, but it can operate in HALT Mode

by using a WDH instruction.

Table 3. Control Register Reset Values

Reset Condition

Addr Reg.

D7 D6 D5 D4 D3 D2 D1 D0 Comments

SPL

00000000

GPR

00000000

FLAGS UUUUUUUU

IMR

UUUUUUU

IRQ

U U

000000 IRQ3 is used

for positive

edge

detection

IPR

UUUUUUUU

F8*

P01M

U U U

U U

F7*

P3M

UUUUUU

0 P2 open-drain

F6*

P2M

11111111 Inputs after

reset

PRE0

UUUUUUU

UUUUUUUU

PRE1

UUUUUU

UUUUUUUU

TMR

00000000

Notes:

*Registers are not reset after a STOP-Mode Recovery using P27

pin. A subsequent reset will cause these control registers to be

reconfigured as shown in Table 4 and the user must avoid bus

contention on the port pins or it may affect device reliability.

Z86L08 Datasheet(PDF) 14 Page - Zilog, Inc.

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