14

Z86L33/L43

CP96LVO1501

AC ELECTRICAL CHARACTERISTICS

Additional Timing Table (Divide-By-One Mode, SCLK/TCLK = XTAL)

T

V

CC

4 MHz

No

Symbol

Parameter

Note [6]

Min

Max

Units

Notes

1

TpC

Input Clock Period

2.0V

250

DC

ns

[1,7,8]

3.9V

250

DC

ns

[1,7,8]

2

TrC,TfC

Clock Input Rise & Fall Times

2.0V

25

ns

[1,7,8]

3.9V

25

ns

[1,7,8]

3

TwC

Input Clock Width

2.0V

125

ns

[1,7,8]

3.9V

125

ns

[1,7,8]

4

TwTinL

Timer Input Low Width

2.0V

100

ns

[1,7,8]

3.9V

70

ns

[1,7,8]

5

TwTinH

Timer Input High Width

2.0V

3TpC

[1,7,8]

3.9V

3TpC

[1,7,8]

6

TpTin

Timer Input Period

2.0V

4TpC

[1,7,8]

3.9V

4TpC

[1,7,8]

7

TrTin,

Timer Input Rise & Fall Timer

2.0V

100

ns

[1,7,8]

TfTin

3.9V

100

ns

[1,7,8]

8A

TwIL

Int. Request Low Time

2.0V

100

ns

[1,2,7,8]

3.9V

70

ns

[1,2,7,8]

8B

TwIL

Int. Request Low Time

2.0V

3TpC

[1,3,7,8]

3.9V

3TpC

[1,3,7,8]

9

TwIH

Int. Request Input High Time

2.0V

3TpC

[1,2,7,8]

3.9V

3TpC

[1,2,7,8]

10

Twsm

STOP Mode Recovery Width Spec 2.0V

12

ns

[4,8]

3.9V

12

ns

[4,8]

11

Tost

Oscillator Startup Time

2.0V

5TpC

[4,8,9]

3.9V

5TpC

[4,8,9]

Notes:

[1] Timing Reference uses 0.7 V

[2] Interrupt request via Port 3 (P31-P33).

[3] Interrupt request via Port 3 (P30).

[4] SMR-D5 = 1, POR STOP Mode Delay is on.

[5] Reg. WDTMR.

[6] V

[7] SMR D1 = 0.

[8] Maximum frequency for internal system clock is 4 MHz when

using XTAL divide-by-one mode.

[9] For RC and LC oscillator, and for oscillator driven by clock driver.