Z89332

Digital Television Controller

1-4

P R E L I M I N A R Y

CP96TEL0607

Table 1. 42-Pin SDIP Pin Identification

Name

Function

Z89332

Direction

Reset

Notes

+ 5 Volts

34

PWR

–

GND

0 Volts

13, 30

PWR

–

IRIN

Infrared Remote Capture

Input

36

I

I

ADC[4:0]

4-Bit A/D Converter Input

9, 10, 11, 12, 28

AI

I

PWM10, PWM9

14-Bit Pulse Width

Modulator Output

1, 2

O

O

PWM[5:1]

8-Bit Pulse Width Modulator

Output

3, 4, 5, 6, 7

OD/O*

O

Port0[F:0]

Bit Programmable

Input/Output Ports

21, -, -, -, -, -, 38, 37,

35, -, -, 15, 8, 40, 39,

11

B

I

[1]

Port1[8:0]

Bit Programmable

Input/Output Ports

16, 12, 20, 19, 18, 17,

42, 41, 14

BI

SCL

39 or 41

BOD

[2]

SCD

40 or 42

BOD

[3]

XTAL1

Crystal Oscillator Input

31

AI

I

XTAL2

Crystal Oscillator Output

32

AO

O

LPF

Loop Filter

29

AB

O

HSYNC

H_SYNC

26

B

I

VSYNC

V_SYNC

27

B

I

/Reset

Device Reset

33

I

I

V[3:1]

OSD Video Output Typically

Drive B, G, and R Outputs

22, 23, 24

O

O

Blank

OSD Blank Output

25

O

O

HalfBlank

OSD Half-Blank Outpu

21

O

[4]

RGB Digital

Outputs

R[1:0], G[1:0], and B[1:0]

Outputs of the RGB Matrix

37, 14, 17, 16, 19, 18

O

[5]

SCLK

Internal Processor SCLK

20

O

[6]

Notes:

1) Port 0 [E:A] is not available on the 42-pin SDIP version.

2) SCL I/O pin is shared with Port 0 or Port 11.

3) SCD I/O pin is shared with Port 02 or Port 12.

4) Half Blank output is a function shared with Port 0F.

5) Digital RGB outputs and the internal SCLK are shared with Port 1 [5:0].

6) Internal processor SCLK is shared with Port 16.

*

PWM outputs are push/pull in Revision Z89332EA and later.