INA333-HT datasheet(14/26 Pages) TI1

14 / 26 page

INA333-HT

SBOS514C – MARCH 2010 – REVISED OCTOBER 2013

www.ti.com

APPLICATION INFORMATION

Application

information

below

provided

for

SETTING THE GAIN

commercial temperature as a reference and not for

high temperature.

Gain of the INA333 is set by a single external

resistor, RG, connected between pins 1 and 8. The

It is not recommended to use a gain < 100 for high

value of RG is selected according to Equation 1:

temperature (210°C) applications. For gains > 100 in

such applications, a compensation circuit is needed

G = 1 + (100 k

Ω/RG)

(1)

at pins 1 and 8. The circuit is needed at each pin and

Table 2 lists several commonly-used gains and

consists of a resistor in series with a capacitor

resistor values. The 100 k

Ω term in Equation 1

referenced to ground. Recommended values for the

comes from the sum of the two internal feedback

resistor and capacitor are 3.5 k

Ω and 10 nF

resistors of A1 and A2. These on-chip resistors are

respectively.

laser trimmed to accurate absolute values. The

Figure 34 shows the basic connections required for

accuracy

and

temperature

coefficient

these

operation of the INA333. Good layout practice

resistors are included in the gain accuracy and drift

mandates the use of bypass capacitors placed close

specifications of the INA333.

to the device pins as shown.

The stability and temperature drift of the external gain

The output of the INA333 is referred to the output

setting resistor, RG, also affects gain. The contribution

reference

(REF)

terminal,

which

normally

of RG to gain accuracy and drift can be directly

grounded. This connection must be low-impedance to

inferred from the gain Equation 1. Low resistor values

assure good common-mode rejection. Although 15

Ω

required for high gain can make wiring resistance

or less of stray resistance can be tolerated while

important. Sockets add to the wiring resistance and

maintaining specified CMRR, small stray resistances

contribute additional gain error (possibly an unstable

of tens of ohms in series with the REF pin can cause

gain error) in gains of approximately 100 or greater.

noticeable degradation in CMRR.

To ensure stability, avoid parasitic capacitance of

more than a few picofarads at the RG connections.

Careful matching of any parasitics on both RG pins

maintains optimal CMRR over frequency.

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