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PCM1753 Datasheet(PDF) 21 Page - Texas Instruments |
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PCM1753 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 38 page ![]() PCM1753, PCM1754, PCM1755 www.ti.com SLES092D – APRIL 2010 – REVISED AUGUST 2015 The OVER bit is used to control the oversampling rate of the delta-sigma D/A converters. The OVER = 1 setting is recommended when the sampling rate is 192 kHz (system clock rate is 128 fS or 192 fS). 8.6.1.2.4 SRST: Reset Default value: 0 The SRST bit is used to enable or disable the soft reset function. The operation is the same as power-on reset. All registers are initialized. 8.6.1.2.5 DACx: DAC Operation Control Where x = 1 or 2, corresponding to the DAC output VOUTL (x = 1) or VOUTR (x = 2). Default value: 0 The DAC operation controls are used to enable and disable the DAC outputs, VOUTL and VOUTR. When DACx = 0, the corresponding output generates the audio waveform dictated by the data present on the DATA pin. When DACx = 1, the corresponding output is set to the bipolar zero level, or 0.5 VCC. 8.6.1.2.6 DM12: Digital De-Emphasis Function Control Default value: 0 The DM12 bit is used to enable or disable the digital de-emphasis function. See the plots shown in the Typical Characteristics section of this data sheet. 8.6.1.2.7 DMF[1:0]: Sampling Frequency Selection for the De-Emphasis Function Default value: 00 The DMF[1:0] bits are used to select the sampling frequency used for the digital de-emphasis function when it is enabled. Copyright © 2010–2015, Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Links: PCM1753 PCM1754 PCM1755 |
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