54AC74/54ACT74

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description

The ’AC/’ACT74 is a dual D-type flip-flop with Asynchronous

Clear and Set inputs and complementary (Q, Q) outputs.

Information at the input is transferred to the outputs on the

positive edge of the clock pulse. Clock triggering occurs at a

voltage level of the clock pulse and is not directly related to

the transition time of the positive-going pulse. After the Clock

Pulse input threshold voltage has been passed, the Data

input is locked out and information present will not be trans-

ferred to the outputs until the next rising edge of the Clock

Pulse input.

Asynchronous Inputs:

LOW input to S

LOW input to C

Clear and Set are independent of clock

Simultaneous LOW on C

HIGH

Features

n

I

n

Output source/sink 24 mA

n

’ACT74 has TTL-compatible inputs

n

Standard Microcircuit Drawing (SMD)

— ’AC74: 5962-88520

— ’ACT74: 5962-87525

n

54AC74 now qualified to 300Krad RHA designation,

refer to the SMD for more information

Logic Symbols

10026601

IEEE/IEC

10026603

10026602

Pin Names

Description

D

Data Inputs

CP

Clock Pulse Inputs

C

Direct Clear Inputs

S

Direct Set Inputs

Q

Outputs

July 2003

© 2003 National Semiconductor Corporation

DS100266

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