 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
MEC1322 Datasheet(PDF) 379 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
MEC1322 Datasheet(HTML) 379 Page - Microchip Technology |
|
|
379 / 456 page  2014 - 2015 Microchip Technology Inc. DS00001719D-page 379 MEC1322 35.8.1 AHB ERROR CONTROL 35.8.2 INTERRUPT CONTROL TABLE 35-4: RUNTIME REGISTER SUMMARY Offset Register Name 04h MCHP Reserved 08h MCHP Reserved 0Ch MCHP Reserved 10h MCHP Reserved 14h AHB Error Control 18h Interrupt Control 1Ch ETM TRACE Enable 20h JTAG Enable 24h MCHP Reserved 28h WDT Event Count 2Ch MCHP Reserved 30h MCHP Reserved 34h MCHP Reserved 38h ADC VREF PD 3Ch MCHP Reserved 40h MCHP Reserved Offset 14h Bits Description Type Default Reset Event 7:1 Reserved R - - 0 AHB_ERROR_DISABLE 0: EC memory exceptions are enabled. 1: EC memory exceptions are disabled. RW 0h VCC1_R ESET Offset 18h Bits Description Type Default Reset Event 31:1 Reserved R - - 0 NVIC_EN This bit enables Alternate NVIC IRQ’s Vectors. The Alternate NVIC Vectors provides each interrupt event with a dedicated (direct) NVIC vector. 0 = Alternate NVIC vectors disabled 1= Alternate NVIC vectors enabled R/W 1b VCC1_R ESET |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
