R7986A datasheet(22/37 Pages) STMICROELECTRONICS

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Application information

R7986A

22/37

DocID026997 Rev 1

Equation 25

Calculate C5 by placing the second pole at four times the system bandwidth (BW):

Equation 26

Set also the first pole at four times the system bandwidth and also the second zero at

the output filter double pole:

Equation 27

The suggested maximum system bandwidth is equal to the switching frequency divided by

3.5 (FSW/3.5), anyway lower than 100 kHz if the FSW is set higher than 500 kHz.

For example, with VOUT = 5 V, VIN = 24 V, IO = 3 A, L = 18 H, COUT = 22 F, and ESR<1

, the Type III compensation network is:

Equation 28

In Figure 12, the module and phase of the open loop gain is shown. The bandwidth is about

32 kHz and the phase margin is 51°.

 R

4 fLC



---------------------------

 R

4 C4 4BW



–



--------------------------------------------------------------

4BW



fLC

----------------- 1

–

---------------------------

 R

3 4BW

 

-----------------------------------------



R1 4.99k

R2 680

R3 200

R4 2k

C3 3.3nF

C4 22nF

C5 220pF





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