L6984ATR datasheet(10/34 Pages) STMICROELECTRONICS

10 / 34 page

Device description

L6984

10/34

DocID025378 Rev 3

Device description

The L6984 device is based on a “Constant On-Time” (COT) control scheme with frequency

feed-forward correction over the VIN range. As a consequence the device features fast load

transient response, almost constant switching frequency operation over the input voltage

range and simple stability control.

The switching frequency can be adjusted in the 250 kHz - 600 kHz range.

The LNM (low noise mode) implements constant PWM control to minimize the voltage ripple

over the load range, the LCM (low consumption mode) pulse skipping technique to increase

the efficiency at the light load.

No external resistor divider is required to regulate fixed 3.3 V output voltage, connecting FB

to the VCC pin and VBIAS to the regulated output voltage (see Figure 1 on page 1). An

external voltage divider implements the output voltage adjustability.

The switchover capability of the internal regulator derives a portion of the quiescent current

from an external voltage source (VBIAS pin is typically connected to the regulated output

voltage) to maximize the efficiency at the light load.

The device main internal blocks are shown in the block diagram in Figure 5:



The bandgap reference voltage



The on-time controller



A “Pulse Width Modulator” (PWM) comparator and the driving circuitry of the

embedded power elements



The SMPS controller block



The soft-start block to ramp the current limitation



The switchover capability of the internal regulator to supply a portion of the quiescent

current when the VBIAS pin is connected to an external output voltage



The current limitation circuit to implement the constant current protection, sensing

pulse-by-pulse low-side switch current.



A circuit to implement the thermal protection function



LNM pin strapping sets the LNM/LCM mode



The PG (“Power Good”) open collector output



The thermal protection circuitry.

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