ISO1541

SCL1

SDA1

GND2

GND1

VCC2

VCC1

8

7

6

5

4

3

2

1

Side 1

Side 2

0.1PF

1k:

1k:

1k:

0.1PF

1k:

2mm max

2mm max

SDA2

SCL2

ISO1540

SDA2

SCL2

SCL1

GND2

GND1

VCC2

VCC1

SDA1

`

8

7

6

5

4

3

2

1

Side 1

Side 2

0.1PF

1k:

1k:

1k:

0.1PF

1k:

2mm max

2mm max

ISO1540, ISO1541

www.ti.com

SLLSEB6C – JULY 2012 – REVISED JUNE 2015

Typical Application (continued)

10.2.2 Detailed Design Procedure

The power supply capacitor of 0.1-µF must be placed as close to the power supply pins as possible.

Recommended placement of capacitors must be 2-mm maximum from input and output power supply pins

(VCC1 and VCC2).

Maximum load permissible on input SDA1 and SCL1 lines is

≤ 40 pF and on output lines SDA2 and SCL2 is ≤

400 pF.

Minimum pullup resistors on input SDA1 and SCL1 lines to VCC1 must be chosen in such a way that input

current drawn is

≤ 3.5 mA. Minimum pullup resistors on input SDA2 and SCL2 lines to VCC2 must be chosen in

such a way that output current drawn is

≤ 35 mA. Whereas maximum pullup resistors on input lines (SDA1 and

SCL1) to VCC1 and on output lines (SDA1 and SCL1) to VCC2, will depend on load and rise time requirements

on respective lines.

Figure 31. Typical ISO1540 Circuit Hookup

Figure 32. Typical ISO1541 Circuit Hookup

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