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ISM67 Datasheet(PDF) 1 Page - ILSI America LLC |
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ISM67 Datasheet(HTML) 1 Page - ILSI America LLC |
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1 / 3 page ![]() 3.2 mm x 2.5 mm Ceramic Package SMD Oscillator, ISM67 Series LVMOS / LVPECL / LVDS ILSI America Phone 775-851-8880 ● Fax 775-851-8882 ●email: e-mail@ilsiamerica.com ● www.ilsiamerica.com Specifications subject to change without notice Rev: 03/10/15_A Page 1 of 3 Product Features Applications 3.20±0.10 2.50±0.10 1.00±0.15 2.30 .70 5 6 4 2 1 3 .60 TYP 1.60 1.30 TYP 1.80 .90 .90 .80 PIN 3 Ground PIN CONNECTIONS PIN 2 Enable/Disable or N/C Output PIN 4 PIN 5 Comp. Output or N/C Voltage Supply PIN 6 Suggested Land Pattern Dimension Units: mm Marking PIN 1 Enable/Disable or N/C Small Surface Mount Package xDSL Ethernet/LAN/WAN Fast Sample Delivery Broadcast Video Optical modules Fast Sample Delivery Wireless Base Stations Clock and data recovery Pb Free/ RoHS Compliant Sonet /SDH FPGA/ASIC Leadfree Processing WiMAX/WLAN Backplanes Server and Storage GPON Frequency LVCMOS LVPECL LVDS 10.000MHz to 250.000MHz 10.000MHz to 1500.000MHz 10.000MHz to 1500.000MHz Output Level LVCMOS LVPECL LVDS Logic “0” = 10% of Vcc max, Logic “1” = 90% of Vcc min Logic “0”= Vcc-1.62V max., Logic “1” = 1.02 V min VOD=(Diff. Output) 350mV Typ. Duty Cycle LVMOS LVPECL LVDS 50% ±5% @ 50% of Vcc 50% ±5% @ 50%* 50% ±5% @ 50%* Rise / Fall Time LVCMOS LVPECL LVDS 2.0 ns max. (10% to 90%)* 0.8 ns max. (20% to 80%)* 0.8 ns max. (20% to 80%)* Output Load LVCMOS LVPECL LVDS 15pF 50 to Vcc - 2.0 VDC RL=100 /CL= 5pF Frequency Stability See Table Below Supply Voltage (Vcc) +3.30 VDC ± 5%, +2.50 VDC ± 5% Aging ±3.0 ppm max per year Current HCMOS = 45 mA max LVPECL = 90 mA max LVDS = 35 mA max Phase Jitter (RMS) (12kHz to 20MHz) 0.9 ps typical Operating Temp. Range See Table Below Storage Temp. Range -40 C to +85 C Part Number Guide Sample Part Number: ISM67–31A9H2–155.520 Package Input Voltage Operating Temperature Stability (in ppm) Output Enable / Disable Complimentary Ouput (Pin 5) ** Frequency ISM67 3 = 3.3V 1 = 0 C to +70 C F = 20 3 = LVCMOS H = Enable (Pin 1) 1 = N.C. -155.520 MHz 6 = 2.5V 2 = -40 C to +85 C A = 25 8 = LVDS K = Enable (Pin 2) 2 = Output 3 = -20 C to +70 C B = 50 9 = LVPECL NOTE: A 0.01 µF bypass capacitor is recommended between VDD (pin 6) and GND (pin 3) to minimize power supply noise. * Measured as percent of waveform. ** Available on LVDS and LVPECL ouput only. |
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