Electronic Components Datasheet Search
  English  ▼

X  

TS51221 Datasheet(PDF) 7 Page - Semtech Corporation

Part # TS51221
Description  High Efficiency Regulator IC for Wireless Power Receiver Applications
PDF  18 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

TS51221 Datasheet(HTML) 7 Page - Semtech Corporation

Back Button TS51221 Datasheet HTML 3Page - Semtech Corporation TS51221 Datasheet HTML 4Page - Semtech Corporation TS51221 Datasheet HTML 5Page - Semtech Corporation TS51221 Datasheet HTML 6Page - Semtech Corporation TS51221 Datasheet HTML 7Page - Semtech Corporation TS51221 Datasheet HTML 8Page - Semtech Corporation TS51221 Datasheet HTML 9Page - Semtech Corporation TS51221 Datasheet HTML 10Page - Semtech Corporation TS51221 Datasheet HTML 11Page - Semtech Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 18 page
background image
TS51221
Final Datasheet
Rev 1.1
April 6, 2015
www.semtech.com
7 of 18
Semtech
Functional Description
TheTS51221wirelesspowerreceiverdeviceisaswitching
converterthatincludesflexibilitytobeusedforawiderange
ofinputvoltagesandisoptimizedforhighefficiencypower
conversionwithlowR
DSONintegratedsynchronousswitches.A
1MHzinternalswitchingfrequencyfacilitateslowcostLCfilter
combinations.Additionally,thefixedoutputversionsenable
aminimumexternalcomponentcounttoprovideacomplete
regulationsolutionwithonly4externalcomponents:aninput
bypasscapacitor,aninductor,anoutputcapacitor,andthe
bootstrapcapacitor.
Detailed Pin Descripttion
Unregulated input, VCC
Thisterminalistheunregulatedinputvoltagesourcefrom
therectifiedreceivercoilvoltage.Itisrecommendedthata
10uFbypasscapacitorbeplacedclosetothedeviceforbest
performance.SincethisisalsothemainsupplyfortheIC,
goodlayoutpracticesneedtobefollowedforthisconnection.
Bootstrap control, BST
Thisterminalwillprovidethebootstrapvoltagerequiredfor
theupperinternalNMOSswitchofthebuckregulator.An
externalceramiccapacitorplacedbetweentheBSTinput
terminalandtheVSWpinwillprovidethenecessaryvoltage
fortheupperswitch.Innormaloperationthecapacitoris
re-chargedoneverylowsidesynchronousswitchingaction.
Inthecaseofwheretheswitchmodeapproaches100%duty
cycleforthehighsideFET,thedevicewillautomaticallyreduce
thedutycycleswitchtoaminimumofftimeonevery8thcycle
toallowthiscapacitortore-charge.
Sense feedback, FB
Thisistheinputterminalfortheoutputvoltagefeedback.
Forthefixedmodeversions,thisshouldbehookeddirectly
toV
OUT.TheconnectiononthePCBshouldbekeptasshort
aspossible,andshouldbemadeascloseaspossibletothe
capacitor.Thetraceshouldnotbesharedwithanyother
connection.(Figure23)
Foradjustablemodeversions,thisshouldbeconnectedto
theexternalresistordivider.Tochoosetheresistors,usethe
followingequation:
VOUT=0.9(1+RTOP/RBOT)
TheinputtotheFBpinishighimpedance,andinputcurrent
shouldbelessthan100nA.Asaresult,goodlayoutpractices
arerequiredforthefeedbackresistorsandfeedbacktraces.
Whenusingtheadjustableversion,thefeedbacktraceshould
bekeptasshortaspossibleandminimumwidthtoreduce
straycapacitanceandtoreducetheinjectionofnoise.
Fortheadjustableversion,theratioofVCC/VOUTcannotexceed
16.
Switching output, VSW
Thisistheswitchingnodeoftheregulator.Itshouldbe
connecteddirectlytothe4.7uHinductorwithawide,short
traceandtooneendoftheBootstrapcapacitor.Itisswitching
betweenVCCandPGNDattheswitchingfrequency.
Ground, GND
Thisgroundisusedforthemajorityofthedeviceincludingthe
analogreference,controlloop,andothercircuits.
Power Ground, PGND
Thisisaseparategroundconnectionusedforthelowside
synchronousswitchtoisolateswitchingnoisefromtherestof
thedevice.(Figure23)
Enable, high-voltage, EN
Thisistheinputterminaltoactivatetheregulator.Theinput
thresholdisTTL/CMOScompatible.Italsohasaninternalpull-
uptoensureastablestateifthepinisdisconnected.
Power Good Output, PG
Thisisanopendrain,activelowoutput.Theswitchedmode
outputvoltageismonitoredandthePGlinewillremainlow
untiltheoutputvoltagereachestheVOUT-UVthreshold.Once
theinternalcomparatordetectstheoutputvoltageisabove
thedesiredthreshold,aninternaldelaytimerisactivatedand
thePGlineisde-assertedtohighoncethisdelaytimerexpires.
IntheeventtheoutputvoltagedecreasesbelowVOUT-UV,the
PGlinewillbeassertedlowandremainlowuntiltheoutput
risesaboveVOUT-UVandthedelaytimertimesout.SeeFigure2
forthecircuitschematicforthePGsignal.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com