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SC2597 Datasheet(PDF) 10 Page - Semtech Corporation |
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SC2597 Datasheet(HTML) 10 Page - Semtech Corporation |
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10 / 13 page ![]() SC2597 10 Critical Layout Guidelines Bias and Reference Capacitors: A 1μF capacitor must be placed as close as possible to the IC and connected between pin 6 (VDD) and the ground plane. A 0.1μF capacitor must be placed as close as possible to the IC and connected between pin 4 (VREF) and the ground plane. The user has an option to add this capaci- tor to the circuit but it is recommended to layout with a capacitor place holder. VDDQ Reference Capacitor: An R-C filter from the supply used for VDDQ consisting of a 100 Ω resistor and a 0.1μF capacitor should be placed as close as possible to the IC and connected between pin 5 (VDDQ) and the ground plane, as shown on page 6. VTT and VIN Capacitors: Since SC2597 provides both sink and source capabilities, the loop impedance through the input and VTT capacitors plays an important role in circuit stability. Figure 4 shows both sink and source current loops. Close attention to board layout is needed to reduce ESL in these loops. During a bode plot measurement for the sourcing current loop, an injected small AC signal flows around the loop from C IN to Q T through C VTT and then returns to C VIN through the ground plane. Therefore, it is recommended to keep the C IN and C VTT capacitors as close as possible to reduce the ESL impedance between them. Similarly in the sinking PG ND on top and bottom layers C6 C7 C4 C5 Route VTT sense trace on inner layer VTT copper pour on top and bottom layers VIN copper pour on top and/or bottom layer C3 C2 C1 C 4,C5 shown located on bottom side Figure 3 — Component Placement and Layout current loop, an injected small AC signal flows from C VTT through Q B and then returns to C VTT through the GND plane. Therefore, it is recommended to keep ESL small for this loop. Balancing the ESL of those loops gives the best case for stability. VIN VTT GN D Q T CVTT CVIN S ourcing C urrent Loop VIN VTT GN D Q B CVTT CVIN S inking C urrent Loop Figure 4 — Small AC Signal Current Loops Figure 2 — Gain and Phase Bode Plot Fc = 810KHz, PM = 36 degree at 1A Source |
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