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UT54ACTS04E Datasheet(PDF) 4 Page - Aeroflex Circuit Technology |
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UT54ACTS04E Datasheet(HTML) 4 Page - Aeroflex Circuit Technology |
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4 / 7 page ![]() 4 Notes: * For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation performance is guaranteed at 25×C per MIL-STD-883 Method 1019, Condition A up to the maximum TID level procured. 1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, - 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed to VIH(min) and VIL(max). 2. Supplied as a design limit but not guaranteed or tested. 3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765pF/ MHz. 4. Not more than one output may be shorted at a time for maximum duration of one second. 5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at frequency of 1MHz and a signal amplitude of 50mV rms maximum. 6. Maximum allowable relative shift equals 50mV. 7. Power dissipation specified per switching output. 8. Parameter guaranteed by design and characterization, but is not tested. AC ELECTRICAL CHARACTERISTICS (Pre and Post-Radiation)* (VDD = 3.0V to 5.5V; VSS = 0V 1, -55 C < T C < +125C); Unless otherwise noted, Tc is per the temperature range ordered Notes: * For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation performance is guaranteed at 25×C per MIL-STD-883 Method 1019, Condition A up to the maximum TID level procured. 1. Maximum allowable relative shift equals 50mV. Ptotal2 Power dissipation 2, 7 CL = 50pF VDD = 3.0V to 3.6V 0.5 mW/ MHz IDDQ Quiescent Supply Current VIN = VDD or VSS VDD from 3.6V to 5.5V 10 A I DDQ Quiescent Supply Current Delta For input under test VIN = VDD - 2.1V For all other inputs VIN = VDD or VSS VDD = 5.5V 1.6 mA CIN Input capacitance 5 = 1MHz VDD = 0V 15 pF COUT Output capacitance 5 = 1MHz VDD = 0V 15 pF SYMBOL PARAMETER CONDITION VDD MINIMUM MAXIMUM UNIT tPLH Input to Yn CL = 50pF 3.0V to 3.6V 2 14 ns 4.5V to 5.5V 1 7 tPHL Input to Yn CL = 50pF 3.0V to 3.6V 2 14 ns 4.5V to 5.5V 1 7 |
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