TLF5964

February 1988

CD4035BMCD4035BC

4-Bit Parallel-InParallel-Out Shift Register

General Description

The CD4035B 4-bit parallel-inparallel-out shift register is a

monolithic complementary MOS (CMOS) integrated circuit

constructed with P- and N-channel enhancement mode

transistors This shift register is a 4-stage clocked serial reg-

ister having provisions for synchronous parallel inputs to

each stage and serial inputs to the first stage via JK logic

Register stages 2 3 and 4 are coupled in a serial ‘‘D’’ flip-

flop configuration when the register is in the serial mode

(parallelserial control low)

Parallel entry via the ‘‘D’’ line of each register stage is per-

mitted only when the parallelserial control is ‘‘high’’

In the parallel or serial mode information is transferred on

positive clock transitions

When the truecomplement control is ‘‘high’’ the true con-

tents of the register are available at the output terminals

When the truecomplement control is ‘‘low’’ the outputs are

the complements of the data in the register The truecom-

plement control functions asynchronously with respect to

the clock signal

JK input logic is provided on the first stage serial input to

minimize logic requirements particularly in counting and se-

quence-generation applications With JK inputs connected

together the first stage becomes a ‘‘D’’ flip-flop An asyn-

chronous common reset is also provided

Features

Y

Wide supply voltage range

30V to 15V

Y

High noise immunity

Y

Low power TTL

Fan out of 2 driving 74L

compatibility

or 1 driving 74LS

Y

4-stage clocked operation

Y

Synchronous parallel entry on all 4 stages

Y

JK inputs on first stage

Y

Asynchronous truecomplement control on all outputs

Y

Reset control

Y

Static flip-flop operation masterslave configuration

Y

Buffered outputs

Y

Low power dissipation

5 mW (typ) (ceramic)

Y

High speed

to 5 MHz

Applications

Y

Automotive

Y

Alarm systems

Y

Data terminals

Y

Industrial controls

Y

Instrumentation

Y

Remote metering

Y

Medical electronics

Y

Computers

Logic Diagram

TLF5964 – 1

TLF5964 – 2

Input to output is

a) A bidirectional low impedance when control input 1 is low and control input 2 is high

b) An open circuit when control input 1 is high and control input 2 is low

C1995 National Semiconductor Corporation

RRD-B30M105Printed in U S A