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CD40192BC Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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CD40192BC Datasheet(HTML) 3 Page - National Semiconductor (TI) |
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3 / 6 page  DC Electrical Characteristics CD40192BCCD40193BC (Note 2) (Continued) Symbol Parameter Conditions b 40 C a 25 C a 85 C Units Min Max Min Typ Max Min Max IOH High Level Output VDD e 5V VO e 46V b 052 b 044 b 088 b 036 mA Current (Note 3) VDD e 10V VO e 95V b 13 b 11 b 225 b 09 mA VDD e 15V VO e 135V b 36 b 30 b 88 b 24 mA IIN Input Current VDD e 15V VIN e 0V b 03 b 10b5 b 03 b 10 m A VDD e 15V VIN e 15V 03 10b5 03 10 m A AC Electrical Characteristics TA e 25 C CL e 50 pF RL e 200 kX input tr e tf e 20 ns unless otherwise specified Symbol Parameter Conditions Min Typ Max Units tPHL or tPLH Propagation Delay Time VDD e 5V 250 400 ns from Count Up or VDD e 10V 100 160 ns Count Down to Q VDD e 15V 80 130 ns tPHL or tPLH Propagation Delay Time VDD e 5V 120 200 ns from Count Up to Carry VDD e 10V 50 80 ns VDD e 15V 40 65 ns tPHL or tPLH Propagation Delay Time VDD e 5V 120 200 ns from Count Down VDD e 10V 50 80 ns to Borrow VDD e 15V 40 65 ns tSU Time Prior to Load VDD e 5V 100 160 ns That Data Must VDD e 10V 30 50 ns Be Present VDD e 15V 25 40 ns tPHL Propagation Delay Time VDD e 5V 130 220 ns from Clear to Q VDD e 10V 60 100 ns VDD e 15V 50 80 ns tPLH or tPHL Propagation Delay Time VDD e 5V 300 480 ns from Load to Q VDD e 10V 120 190 ns VDD e 15V 95 150 ns tTLH or tTHL Output Transition Time VDD e 5V 100 200 ns VDD e 10V 50 100 ns VDD e 15V 40 80 ns fCL Maximum Count Frequency VDD e 5V 25 4 MHz VDD e 10V 6 10 MHz VDD e 15V 75 125 MHz trCL or tfCL Maximum Count Rise VDD e 5V 15 m s or Fall Time VDD e 10V 5 m s VDD e 15V 1 m s tWH tWL Minimum Count Pulse VDD e 5V 120 200 ns Width VDD e 10V 35 80 ns VDD e 15V 28 65 ns tWH Minimum Clear VDD e 5V 300 480 ns Pulse Width VDD e 10V 120 190 ns VDD e 15V 95 150 ns tWL Minimum Load VDD e 5V 100 160 ns Pulse Width VDD e 10V 40 65 ns VDD e 15V 32 55 ns CIN Average Input Capacitance Load and Data 5 75 pF Inputs (ABCD) Count Up Count 10 15 pF Down and Clear CPD Power Dissipation Capacity (Note 4) 100 pF AC Parameters are guaranteed by DC correlated testing Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices should be operated at these limits The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOH and IOL are tested one output at a time Note 4 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C74C Family Characteristics application note AN-90 3 |
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