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SP6120B Datasheet(PDF) 18 Page - Sipex Corporation |
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SP6120B Datasheet(HTML) 18 Page - Sipex Corporation |
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18 / 22 page ![]() 18 Date: 5/25/04 SP6120B Low Voltage, AnyFETTM, Synchronous, Buck Controller © Copyright 2004 Sipex Corporation Current Sense The SP6120B allows sensing current using the inductor, PCB trace or current-sense resistor. Inductor-sense utilizes the voltage drop across the ESR of the inductor, while PCB trace and current-sense resistor introduce additional re- sistance in series with the inductor. The resis- tance of the sense element determines the overcurrent protection threshold as follows, ILIM = 43mV RSEN RSEN = current-sense resistance which can be implemented as ESR of the inductor, trace or discrete resistor. The maximum power dissipation on the current- sense element is: SEN OUT SEN R I P 2 (max) = For the inductor-sense scheme shown in the application circuit, RS and CS are used to repli- cate the signal across the ESR of the inductor. RS and CS can be looked at as a low pass filter whose output represents the DC differential voltage between the switch node and the output. At steady state, this voltage happens to be the output current times the ESR of the inductor. In addition, if the following relationship is satisfied, L = R SCS ESR the output of the RsCs filter represents the exact voltage across the ESR, including the ripple. Since the SP6120B’s hiccup overcurrent pro- tection scheme is intended to safeguard sus- tained overload conditions, the DC portion of the current signal is more of interest. Therefore, designing the RSCS time constant higher than L/ ESR provides reliable current sense against any premature triggering due to noise or any tran- sient conditions. Pick Rs between 10k and 100k, and Cs can be determined by: C S = 2 L1 ESR R S Here the time constant of RSCS is twice the value of L/ESR. In some applications, it may be desirable to extend the current sense capability of a given RSEN element (usually the inductor ESR) be- In Figure 18, R1 and C1 provides a zero fZ1 which needs to be placed at or below fP(LC). If fZ1 is made equal to fP(LC) for convenience, the value of C1 can be calculated as C 1 = 1 2 πf P(LC)R1 The optional C2 generates a pole fP1 with R1 to cut down high frequency noise for reliable op- eration. This pole should be placed one decade higher than the crossover frequency to avoid erosion of phase margin. Therefore, the value of the C2 can be derived from C 2 = 1 20 πfCOR1 Figure 19 illustrates the overall loop frequency response and frequency of each pole and zero. To fine-tune the compensation, it is necessary to physically measure the frequency response us- ing a network analyzer. Gain -20db/dec -40db/dec -20db/dec -20db/dec -20db/dec Error Amplifier Loop f f fZ1 fP(LC) fZ(ESR) fCO fP1 Figure 19. Frequency response of a stable system and its error amplifier. |
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