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SP6120EY Datasheet(PDF) 17 Page - Sipex Corporation |
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SP6120EY Datasheet(HTML) 17 Page - Sipex Corporation |
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17 / 22 page ![]() 17 Date: 5/25/04 SP6120 Low Voltage, AnyFETTM, Synchronous, Buck Controller © Copyright 2004 Sipex Corporation thermal improvement can be achieved in the maxi- mum power dissipation through the proper design of copper mounting pads on the circuit board. For example, in a SO-8 package, placing two 0.04 square inches copper pad directly under the pack- age, without occupying additional board space, can increase the maximum power from approxi- mately 1 to 1.2W. For DPAK package, enlarging the tap mounting pad to 1 square inches reduces the RΘJA from 96°C/W to 40°C/W. Schottky Diode Selection When paralleled with the bottom MOSFET, an optional Schottky diode can improve efficiency and reduce noises. Without this Schottky diode, the body diode of the bottom MOSFET conducts the current during the non-overlap time when both MOSFETs are turned off. Unfortunately, the body diode has high forward voltage and reverse recov- ery problem. The reverse recovery of the body diode causes additional switching noises when the diode turns off. The Schottky diode alleviates these noises and additionally improves efficiency thanks to its low forward voltage. The reverse voltage across the diode is equal to input voltage, and the diode must be able to handle the peak current equal to the maximum load current. The power dissipation of the Schottky diode is determined by PDIODE = 2VFIOUTTNOLFS where TNOL = non-overlap time between GH and GL. VF = forward voltage of the Schottky diode. SP6120 ® ® C2 C1 R1 COMP Figure 18. The RC network connected to the COMP pin provides a pole and a zero to control loop. Loop Compensation Design The goal of loop compensation is to manipulate loop frequency response such that its gain crosses over 0db at a slope of –20db/dec. The SP6120 has a transconductance error amplifier and re- quires the compensation network to be con- nected between the COMP pin and ground, as shown in Figure 18. The first step of compensation design is to pick the loop crossover frequency. High crossover frequency is desirable for fast transient response, but often jeopardize the system stability. Since the SP6120 is equipped with 3% window com- parator that takes over the control loop on tran- sient, the crossover frequency can be selected primarily to the satisfaction of system stability. Crossover frequency should be higher than the ESR zero but less than 1/5 of the switching frequency. The ESR zero is contributed by the ESR associated with the output capacitors and can be determined by: f Z(ESR) = 1 2 πCOUTRESR Crossover frequency of 20kHz is a sound first try if low ESR tantalum capacitors or poscaps are used at the output. The next step is to calcu- late the complex conjugate poles contributed by the LC output filter, f P(LC) = 1 2 π√ LCOUT The open loop gain of the whole system can be divided into the gain of the error amplifier, PWM modulator, buck converter, and feedback resistor divider. In order to crossover at the selected frequency fco, the gain of the error amplifier has to compensate for the attenuation caused by the rest of the loop at this frequency. In the RC network shown in Figure 18, the product of R1 and the error amplifier transconductance determines this gain. There- fore, R1 can be determined from the following equation that takes into account the typical error amplifier transconductance, reference voltage and PWM ramp built into the SP6120. R 1 = 1300V OUT fCO fZ(ESR) V IN fP(LC) 2 APPLICATIONS INFORMATION: Continued |
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