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SP6120EY/TR Datasheet(PDF) 16 Page - Sipex Corporation |
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SP6120EY/TR Datasheet(HTML) 16 Page - Sipex Corporation |
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16 / 22 page ![]() 16 Date: 5/25/04 SP6120 Low Voltage, AnyFETTM, Synchronous, Buck Controller © Copyright 2004 Sipex Corporation lum capacitors are considered. Tantalum capaci- tors are known for catastrophic failure when ex- posed to surge current, and input capacitors are prone to such surge current when power supplies are connected ‘live’ to low impedance power sources. Certain tantalum capacitors, such as AVX TPS series, are surge tested. For generic tantalum capacitors, use 2:1 voltage derating to protect the input capacitors from surge fall-out. MOSFET Selection The losses associated with MOSFETs can be divided into conduction and switching losses. Conduction losses are related to the on resistance of MOSFETs, and increase with the load current. Switching losses occur on each on/off transition when the MOSFETs experience both high current and voltage. Since the bottom MOSFET switches current from/to a paralleled diode (either its own body diode or a Schottky diode), the voltage across the MOSFET is no more than 1V during switching transition. As a result, its switching losses are negligible. The switching losses are difficult to quantify due to all the variables affecting turn on/ off time. However, the following equation pro- vides an approximation on the switching losses associatedwiththetopMOSFETdrivenbySP6120. S OUT IN rss SH F I V C P (max) (max) (max) 12 = where Crss = reverse transfer capacitance of the top MOSFET Switching losses need to be taken into account for high switching frequency, since they are directly proportional to switching frequency. The conduc- tion losses associated with top and bottom MOSFETs are determined by: D I R P OUT ON DS CH 2 (max) ) ( (max) = ) 1 ( 2 (max) ) ( (max) D I R P OUT ON DS CL − = where PCH(max) = conduction losses of the high side MOSFET PCL(max) = conduction losses of the low side MOSFET RDS(ON) = drain to source on resistance. The total power losses of the top MOSFET are the sum of switching and conduction losses. For syn- chronous buck converters of efficiency over 90%, allow no more than 4% power losses for high or low side MOSFETs. For input voltages of 3.3V and 5V, conduction losses often dominate switch- ing losses. Therefore, lowering the RDS(ON) of the MOSFETs always improves efficiency even though it gives rise to higher switching losses due to increased Crss. Top and bottom MOSFETs experience unequal conduction losses if their on time is unequal. For applications running at large or small duty cycle, it makes sense to use different top and bottom MOSFETs. Alternatively, parallel multiple MOSFETs to conduct large duty factor. RDS(ON) varies greatly with the gate driver voltage. The MOSFET vendors often specify RDS(ON) on multiple gate to source voltages (VGS), as well as provide typical curve of RDS(ON) versus VGS. For 5V input, use the RDS(ON) specified at 4.5V VGS. At the time of this publication, vendors, such as Fairchild, Siliconix and International Rectifier, have started to specify RDS(ON) at VGS less than 3V. This has provided necessary data for designs in which these MOSFETs are driven with 3.3V and made it possible to use SP6120 in 3.3V only applications. Thermal calculation must be conducted to ensure the MOSFET can handle the maximum load cur- rent. The junction temperature of the MOSFET, determined as follows, must stay below the maxi- mum rating. JA MOSFET A J R P T T θ (max) (max) ( max) + = where TA(max) = maximum ambient temperature PMOSFET(max) = maximum power dissipa- tion of the MOSFET RΘJA = junction to ambient thermal resistance. RΘJA of the device depends greatly on the board layout, as well as device package. Significant APPLICATIONS INFORMATION: Continued |
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