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TPS22981RGPR Datasheet(PDF) 7 Page - Texas Instruments |
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TPS22981RGPR Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 27 page ![]() TPS22981 www.ti.com SLVSBM6B – DECEMBER 2012 – REVISED NOVEMBER 2015 7 Detailed Description 7.1 Overview TPS22981 is a power mux designed for Thunderbolt™ and Thunderbolt II™ applications (based on the Mini DisplayPort connector). Thunderbolt and Thunderbolt II provide options for different voltage levels to be supplied to an external Thunderbolt cable, and on to a device or host connected on the far end of that cable. Thunderbolt and Thunderbolt II initiate operation with a nominal 3.3-V voltage (3-V to 3.6-V range is supported by TPS22981), but can be configured through the interface protocol to enable a high-voltage mode (TPS22981 supports the range of 4.5 V to 19.8 V). In operation, transition from the 3.3-V mode to the high-voltage mode requires that system brownout not occur. The TPS22981 achieves this by enabling the high-voltage path (when a high-voltage input is available and HV_EN is asserted) and monitoring for reverse current though the low-voltage switch back to V3P3. When reverse current is detected, the low-voltage path is disabled. Similarly, when switching from high voltage back to low voltage, it is normally undesirable for the system output voltage to brownout. TPS22981 avoids brownout by breaking the high-voltage connection and discharging the output until it reaches approximately 3.3 V, at which point the low-voltage path is enabled to avoid excessive droop of the output voltage. However, if the output voltage (on the OUT pins) is loaded, the output voltage may transition to 0 V before returning to 3.3 V (see Transition Delays). TPS22981 also provides resistor-controlled current limiting, undervoltage lockout (UVLO), and thermal protection. The high-voltage path on TPS22981 may be current limited to two independently controlled current-limiting levels, with the current-limiting level selected through the S0 input pin. A system host processor may be alerted to fault conditions with the FAULTZ pin (see Table 3). Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: TPS22981 |
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