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PI6C10810LE Datasheet(PDF) 1 Page - Pericom Semiconductor Corporation |
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PI6C10810LE Datasheet(HTML) 1 Page - Pericom Semiconductor Corporation |
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1 / 10 page ![]() 1 PS9014A 02/23/11 Pin Description Pin Name Description BUF_IN Input CLK [0:9] Outputs GND Ground VDDA, VDDB, VDDC Power (1.2V, 1.5V, 1.8V, 2.5V) Pin Configuration Block Diagram Features • High-speed,low-noise,non-invertingsplit1-10buffer • MaximumFrequencyupto250MHz • Lowoutputskew<60ps(BankA,2.5V) • Lowdutycycledistortion<200ps • Lowpropagationdelay<2.0ns(2.5V) • Choiceof1.2V,1.5V,1.8Vor2.5VsupplyvoltageonBankA, BankB,BankC • Industrialtemperaturerange:–40°C to 85°C • Packages(Pb-free&Green):20-pin,TSSOP(L20) 20-pin,SSOP(H20) 20-pin,QSOP(Q20) 1.2V-2.5V, 250MHz, 1:10 Networking Clock Buffer PI6C10810 Description The PI6C10810 is a 1.2V to 2.5V high-speed, low-noise 1-10 non-inverting clock buffer.The key goal in designing the PI6C10810istotargetnetworkingapplicationsthatrequirelow- skew,low-jitter,andhigh-frequencyclockdistribution. Providingoutput-to-outputskewaslowas60ps,thePI6C10810 is an ideal clock distribution device for synchronous systems. Designingsynchronousnetworkingsystemsrequiresatightlevel ofskewfromalargenumberofoutputs. CLK0-4operatefromVDDAsupply. CLK5-6operatefromVDDCsupply. CLK7-9operatefromVDDBsupply. 1 2 3 VDDA 4 CLK1 5 CLK0 6 CLK2 7 VDDA 8 GND 9 GND 10 VDDB CLK8 GND VDDC CLK6 GND CLK5 20 CLK4 19 18 17 16 15 14 13 12 11 BUF_IN GND CLK3 CLK7 CLK9 CLK2 CLK1 CLK0 BUF_IN CLK3 CLK4 CLK7 CLK6 CLK5 CLK8 CLK9 VDDA VDDC VDDB 11-0015 |
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