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PI6CFGL402B Datasheet(PDF) 2 Page - Pericom Semiconductor Corporation |
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PI6CFGL402B Datasheet(HTML) 2 Page - Pericom Semiconductor Corporation |
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2 / 8 page ![]() 2 PI6CFGL402B Low Power PCIe 3.0 Clock Generator with 4 HCSL Outputs All trademarks are property of their respective owners. www.pericom.com 03/03/15 Pin Description Pin # Pin Name I/O Type Description 1 VDDA3.3 Power 3.3V power for PLL core. 2 S0 Input Spread Spectrum Select pin #0. See Spread Selection Table. Internal pull-up resistor. 3 S1 Input Spread Spectrum Select pin #1. See Spread Selection Table. Internal pull-up resistor. 4 S2 Input Spread Spectrum Select pin #2. See Spread Selection Table. Internal pull-up resistor. 5 X1 Input Crystal connection. 6 X2 Output Crystal connection. 7 PD Input Power down. Internal pull-up resistor. 8 OE Input Output enable. Tri-states output (High=enable outputs); Low=disable outputs). Internal pull- up resister. 9 GNDXD Power Connect to digital circuit ground. 10 VDDDIG3.3 Power 3.3V digital power. 11 CLK3 Output Selectable 100/200 MHz Spread Spectrum differential compliment output clock 3. LOW when output is disabled. 12 CLK3 Output Selectable 100/200 MHz Spread Spectrum differential true output clock 3. LOW when output is disabled. 13 CLK2 Output Selectable 100/200 MHz Spread Spectrum differential compliment output clock 2. LOW when output is disabled. 14 CLK2 Output Selectable 100/200 MHz Spread Spectrum differential true output clock 2. LOW when output is disabled. 15 VDDO Power Output power supply, nominal 1.8V, range 1.05V~3.3V. 16 GNDA Power Output and Analog circuit ground 17 CLK1 Output Selectable 100/200 MHz Spread Spectrum differential compliment output clock 1. LOW when output is disabled. 18 CLK1 Output Selectable 100/200 MHz Spread Spectrum differential true output clock 1. LOW when output is disabled. 19 CLK0 Output Selectable 100/200 MHz Spread Spectrum differential compliment output clock 0. LOW when output is disabled. 20 CLK0 Output Selectable 100/200 MHz Spread Spectrum differential true output clock 0. LOW when output is disabled. Table 2: Spread Selection Table S2 S1 S0 Spread % Spread Type Output Frequency 0 0 0 -0.5 Down 100 0 0 1 -1.0 Down 100 0 1 0 -1.5 Down 100 0 1 1 No Spread Not Applicable 100 1 0 0 -0.5 Down 200 1 0 1 -1.0 Down 200 1 1 0 -1.5 Down 200 1 1 1 No Spread Not Applicable 200 15-0032 |
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