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2015-06-0002

PT0322-8

06/16/15

13

PT7C4311

Real-time Clock Module (I

a)

Write via I

b)

Read via I



Standard read



Simplified read

Note:

1.

The above steps are an example of transfers of one or two bytes only. There is no limit to the number of bytes transferred

during actual communications.

2.

49H, 4AH are used as test mode address. Customer should not use the addresses.

Slave address (7 bits)

1

1

0

1

0

0

0

0

write

Addr. setting

Slave address + write specification

Address

Specifies the write start address.

A

bit

7

6

5

4

3

2

1

0

bit

bit

bit

bit

bit

bit

bit

A

P

Write data

S

A

A

C

K

A

C

K

A

C

K

Start

Stop

Slave address (7 bits)

1

1

0

1

0

0

0

0

write

Slave address + write specification

Address

Specifies the read start address.

Addr. setting

A

S

Slave address (7 bits)

1

1

0

1

0

0

0

1

Read

Slave address + read specification

Data read (1)

Data is read from the specified start

address and address auto increment.

A

bit

7

6

5

4

3

2

1

0

bit

bit

bit

bit

bit

bit

bit

/A

P

Sr

7

6

5

4

3

2

1

0

bit

bit

bit

bit

bit

bit

bit

bit

Data read (2)

Address auto increment to set the

address for the next data to be read.

A

C

K

N

O

A

C

K

A

A

C

K

A

C

K

A

C

K

A

Start

Stop

Restart

Data read (2)

Address register auto increment to set

the address for the next data to be

read.

Data read (1)

Data is read from the address pointed

by the internal address register and

address auto increment.

Slave address (7 bits)

1

1

0

1

0

0

0

1

Read

A

bit

7

6

5

4

3

2

1

0

bit

bit

bit

bit

bit

bit

bit

/A

P

S

7

6

5

4

3

2

1

0

bit

bit

bit

bit

bit

bit

bit

bit

A

C

K

N

O

A

C

K

A

C

K

A

Stop

Start

Slave address + read specification