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M08045 Datasheet(PDF) 48 Page - M/A-COM Technology Solutions, Inc. |
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M08045 Datasheet(HTML) 48 Page - M/A-COM Technology Solutions, Inc. |
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48 / 49 page ![]() Control Registers Map and Descriptions M08035, M08045 Data Sheet V1 MACOM ™ 48 080x5-DSH-001 Register Address: 85h Default: 00h Register Name: Alarm Clear Description: Clears Latched Alarms. To properly clear all alarm bits, write “1” followed by a “0” to bit 0. Register Address: 87h Default: 00h Register Name: Checksum result Description: Shows the result of the checksum calculation Register Address: 88h Default: 00h Register Name: Reclocker Status Register Description: Reads status of the Reclocker Register Address: 89h Default: 00h Register Name: Reclocker Rate Detect Description: Reads data rate for Reclocker Bit Bit Description Default R/W 7:2 Reserved 000000b R/W 1 0b: Normal operation 1b: Soft reset for Reclocker (for master reset use reg 80h) 0b R/W 0 0b: Normal operation 1b: Clears all alarm bits in registers 83h, 84h and 88h 0b R/W Bit Bit Description Default R/W 7:0 Checksum result 00000000b R/W Bit Bit Description Default R/W 7:6 Reserved 00b R 5 0b: Reference clock is present 1b: Reference clock is not present 0b R 4 0b: PLL locked 1b: PLL unlocked 0b R 3:1 Reserved XXXb R 0 0b: Reclocker, locked 1b: Reclocker, un-locked 0b R Bit Bit Description Default R/W 7:2 Reserved XXXXXXb R 1:0 00b: Reclocker: un-locked 01b: Reclocker: SD data rate detected 10b: Reclocker: HD data rate detected 11b: Reclocker: 3G data rate detected (M08045) 00b R |
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