MB9B120M datasheet(5/109 Pages) SPANSION

5 / 109 page

D a t a S h e e t

MB9B120M_DS706-00050-3v0-E, March 18, 2015

CONFIDENTIAL

 Features

 32-bit ARM Cortex-M3 Core

 Processor version: r2p1

 Up to 72 MHz Frequency Operation

 Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and

48 peripheral interrupts and 16 priority levels

 24-bit System timer (Sys Tick): System timer for OS task management

 On-chip Memories

[Flash memory]

 Dual operation Flash memory

 Dual Operation Flash memory has the upper bank and the lower bank.

So, this series could implement erase, write and read operations

for each bank simultaneously.

 Main area: Up to 256 Kbytes (Up to 240 Kbytes upper bank + 16 Kbytes lower bank)

 Work area: 32 Kbytes (lower bank)

 Read cycle: 0 wait-cycle

 Security function for code protection

[SRAM]

This Series on-chip SRAM is composed of two independent SRAM (SRAM0, SRAM1). SRAM0 is

connected to I-code bus and D-code bus of Cortex-M3 core. SRAM1 is connected to System bus.

 SRAM0: Up to 16 Kbytes

 SRAM1: Up to 16 Kbytes

 Multi-function Serial Interface (Max eight channels)

 4 channels with 16steps×9-bit FIFO (ch.0/1/3/4), 4 channels without FIFO (ch.2/5/6/7)

 Operation mode is selectable from the followings for each channel.

 UART

 CSIO

 LIN

 I

[UART]

 Full duplex double buffer

 Selection with or without parity supported

 Built-in dedicated baud rate generator

 External clock available as a serial clock

 Hardware Flow control : Automatically control the transmission/reception by CTS/RTS (only ch.4)

 Various error detection functions available (parity errors, framing errors, and overrun errors)

[CSIO]

 Full duplex double buffer

 Built-in dedicated baud rate generator

 Overrun error detection function available

[LIN]

 LIN protocol Rev.2.1 supported

 Full duplex double buffer

 Master/Slave mode supported

 LIN break field generation (can be changed to 13 to 16-bit length)

 LIN break delimiter generation (can be changed to 1 to 4-bit length)

 Various error detection functions available (parity errors, framing errors, and overrun errors)

2C]

Standard mode (Max 100 kbps) / Fast mode (Max 400 kbps) supported

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