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MB9B310R Datasheet(PDF) 7 Page - SPANSION |
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MB9B310R Datasheet(HTML) 7 Page - SPANSION |
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7 / 129 page ![]() D a t a S h e e t 4 MB9B310R-DS706-00027-3v0-E, March 11, 2015 CONFIDENTIAL DMA Controller (Eight channels) DMA Controller has an independent bus for CPU, so CPU and DMA Controller can process simultaneously. 8 independently configured and operated channels Transfer can be started by software or request from the built-in peripherals Transfer address area: 32-bit (4 Gbyte) Transfer mode: Block transfer/Burst transfer/Demand transfer Transfer data type: byte/half-word/word Transfer block count: 1 to 16 Number of transfers: 1 to 65536 A/D Converter (Max 16 channels) [12-bit A/D Converter] Successive Approximation Register type Built-in 3 unit Conversion time: 1.0 μs @ 5 V Priority conversion available (priority at 2 levels) Scanning conversion mode Built-in FIFO for conversion data storage (for SCAN conversion: 16 steps, for Priority conversion: 4 steps) Base Timer (Max eight channels) Operation mode is selectable from the followings for each channel. 16-bit PWM timer 16-bit PPG timer 16-/32-bit reload timer 16-/32-bit PWC timer General Purpose I/O Port This series can use its pins as general purpose I/O ports when they are not used for external bus or peripherals. Moreover, the port relocate function is built in. It can set which I/O port the peripheral function can be allocated. Capable of pull-up control per pin Capable of reading pin level directly Built-in the port relocate function Up 103 fast general purpose I/O Ports @ 120 pin Package Some pin is 5 V tolerant I/O. See "Pin Description" to confirm the corresponding pins. |
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