ADC16071CIWM datasheet(6/20 Pages) NSC

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AC Electrical Characteristics for Frame Sync Out (FSO) Serial Clock Out

(SCO) and Serial Data Out (SDO)

The following specifications apply for VAa e VDa e VMa e 5V unless otherwise specified Boldface limits apply for TA

TJ e TMIN to TMAX all other limits TA e TJ e 25 C

Symbol

Parameter

Conditions

Typical

Limits

Units

(Note 6)

(Note 7)

(Limit)

tSCOFSOH

Delay from Serial Clock Out to

ns (max)

Frame Sync Output High

tSCOFSOL

Delay from Serial Clock Out to

ns (max)

Frame Sync Output Low

tSDOV

Delay from Serial Clock Out to

ns (max)

Serial Data Output Valid

tFSIFSOL

Delay from Frame Sync Input to

tCLK (max)

Frame Sync Output Low

AC Electrical Characteristics for Data Output Enable (DOE)

The following specifications apply for VAa e VDa e VMa e 5V unless otherwise specified Boldface limits apply for TA

TJ e TMIN to TMAX all other limits TA e TJ e 25 C

Symbol

Parameter

Conditions

Typical

Limits

Units

(Note 6)

(Note 7)

(Limit)

tDOEE

Data Output Enable Delay Time

ns (max)

tDOED

Data Output Disable Delay Time

ns (max)

Note 1

Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate conditions for which the device is

functional but do not guarantee specific performance limits For guaranteed specifications and test conditions see the Electrical Characteristics The guaranteed

specifications apply for the test conditions listed Some performance characteristics may degrade when the device is not operated under the listed test conditions

Note 2

All voltages are measured with respect to GND unless otherwise specified

Note 3

When the input voltage (VIN) at any pin exceeds the power supply rails (VIN k GND or VIN l (VAa VMa orVDa)) the current at that pin should be limited

to 25 mA The 100 mA maximum package input current rating allows the voltage at any four pins with an input current of 25 mA each to simultaneously exceed the

power supply voltages

Note 4

The maximum power dissipation is a function of the maximum junction temperature (TJ(MAX)) total thermal resistance (iJA) and ambient temperature (TA)

The maximum allowable power dissipation at any ambient temperature is PD(max) e (TJ(max) b TA) iJA When board mounted the ADC16071ADC16471’s

typical thermal resistance is

Order Number

iJA

ADC16071CIN ADC16471CIN

47 CW

ADC16071CIWM ADC16471CIWM

72 CW

Note 5

Human body model 100 pF discharge through a 15 kX resistor The machine model is a 200 pF capacitor discharged directly into each pin

Note 6

Typicals are at TA e 25 C and represent most likely parametric norm

Note 7

Limits are guaranteed to National’s AOQL (Average Output Quality Level)

Note 8

The VINa pin is shorted to the VINb pin

Note 9

The input impedance between VINa and VINb due to the effective resistance of the switch capacitor input varies as follows

ZIN e

1012

235 (

fCLK

)

ADC16071CIWM Datasheet(PDF) 6 Page - National Semiconductor (TI)

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