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RF2637

DS130620

7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical

support, contact RFMD at ((+1) 336-678-5570 or c

customerservice@rfmd.com.

Pin

Function

Description

Interface Schematic

1IN+

CDMA balanced input pin. This pin is internally DC-biased and should be

tion, one pin is used as an input and the other CDMA input is AC-coupled to

ground. The balanced input impedance is 1k

:, while the single-ended

input impedance is 500

:.

2IN-

Same as pin 2, except complementary input.

See pin 1.

3GND

Ground connection. For best performance, keep traces physically short

and connect immediately to ground plane.

4GC

Analog gain adjustment for all amplifiers. Valid control ranges are from 0V

to 2.5V. Maximum gain is selected with 2.5V. Minimum gain is selected

with 0V. These voltages are only valid for a 4.7 k

: DC source impedance.

5OUT-

Balanced output pin. This is an open-collector output, designed to operate

into a 250

: balanced load. The load sets the operating impedance, but an

to correctly bias this output. This bias inductor is typically incorporated in

the matching network between the output and next stage. Because this pin

input has a DC path to ground.

6OUT+

Same as pin 5, except complementary output.

See pin 5.

7VCC2

Supply voltage pin. External bypassing is required. The trace length

between the pin and the bypass capacitors should be minimized. The

ground side of the bypass capacitors should connect immediately to

ground plane.

8VCC1

Same as pin 7.

See pin 7.

700

:

BIAS

700

:

CDMA-

CDMA+

23.5 k

:

15 k

:

12 . 7 k

:

OUT-

OUT+