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CD4093BC Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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CD4093BC Datasheet(HTML) 3 Page - National Semiconductor (TI) |
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3 / 6 page ![]() DC Electrical Characteristics CD4093BC (Note 2) Symbol Parameter Conditions b 40 C a 25 C a 85 C Units Min Max Min Typ Max Min Max IDD Quiescent Device VDD e 5V 10 10 75 m A Current VDD e 10V 20 20 150 m A VDD e 15V 40 40 300 m A VOL Low Level VIN e VDD lIOl k 1 mA Output Voltage VDD e 5V 005 0 005 005 V VDD e 10V 005 0 005 005 V VDD e 15V 005 0 005 005 V VOH High Level VIN e VSS lIOl k 1 mA Output Voltage VDD e 5V 495 495 5 495 V VDD e 10V 995 995 10 995 V VDD e 15V 1495 1495 15 1495 V VTb Negative-Going Threshold lIOl k 1 mA Voltage (Any Input) VDD e 5V VO e 45V 13 225 15 18 225 15 23 V VDD e 10V VO e 9V 285 45 30 41 45 30 465 V VDD e 15V VO e 135V 435 675 45 63 675 45 69 V VTa Positive-Going Threshold lIOl k 1 mA Voltage (Any Input) VDD e 5V VO e 05V 275 36 275 33 35 265 35 V VDD e 10V VO e 1V 55 715 55 62 70 535 70 V VDD e 15V VO e 15V 825 1065 825 90 105 81 105 V VH Hysteresis (VTa b VTb)VDD e 5V 05 235 05 15 20 035 20 V (Any Input) VDD e 10V 10 43 10 22 40 070 40 V VDD e 15V 15 63 15 27 60 120 60 V IOL Low Level Output VIN e VDD Current (Note 3) VDD e 5V VO e 04V 052 044 088 036 mA VDD e 10V VO e 05V 13 11 225 09 mA VDD e 15V VO e 15V 36 30 88 24 mA IOH High Level Output VIN e VSS Current (Note 3) VDD e 5V VO e 46V b 052 044 b 088 b 036 mA VDD e 10V VO e 95V b 13 b 11 b 225 b 09 mA VDD e 15V VO e 135V b 36 b 30 b 88 b 24 mA IIN Input Current VDD e 15V VIN e 0V b 03 b 10b5 b 03 b 10 m A VDD e 15V VIN e 15V 03 10b5 03 10 m A AC Electrical Characteristics TA e 25 C CL e 50 pF RL e 200k Input tr tf e 20 ns unless otherwise specified Symbol Parameter Conditions Min Typ Max Units tPHL tPLH Propagation Delay Time VDD e 5V 300 450 ns VDD e 10V 120 210 ns VDD e 15V 80 160 ns tTHL tTLH Transition Time VDD e 5V 90 145 ns VDD e 10V 50 75 ns VDD e 15V 40 60 ns CIN Input Capacitance (Any Input) 50 75 pF CPD Power Dissipation Capacitance (Per Gate) 24 pF AC Parameters are guaranteed by DC correlated testing Note 2 VSS e 0V unless otherwise specified Note 3 IOH and IOL are tested one output at a time 3 |
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